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| 型號(hào)： | 21329 |
| 英文描述： | AMD-K6 Processor Power Supply Design Application Note AMD-K6 Processor Bios Design Application Note |
| 中文描述： | 的AMD - K6處理器電源設(shè)計(jì)應(yīng)用指南的AMD - K6處理器的BIOS設(shè)計(jì)中的應(yīng)用說明 |
| 文件頁數(shù)： | 37/52頁 |
| 文件大?。?/td> | 687K |
| 代理商： | 21329 |
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Model-Specific Registers (MSRs)
27
21329L/0—December 1999
AMD-K6
Processor BIOS Design
Prior to programming write-combining or uncacheable areas of
memory in the UWCCR, the software must disable the
processor’s cache, then flush the cache. This can be achieved by
setting the CD bit in CR0 to 1 and executing the WBINVD
instruction. Following the programming of the UWCCR, the
processor’s cache must be enabled by setting the CD bit in CR0
to 0.
Figure 7.
UC/WC Cacheability Control Register (UWCCR)
—MSR C000_0085h (Model 8/[F:8])
Physical Base Address n (n=0, 1).
This address is the 15 most-
significant bits of the physical base address of the memory
range. The least-significant 17 bits of the base address are not
needed because the base address is by definition always aligned
on a 128-Kbyte boundary.
Physical Address Mask n (n=0, 1).
This value is the 15 most-
significant bits of a physical address mask that is used to define
the size of the memory range. This mask is logically ANDed
with both the physical base address field of the UWCCR
register and the physical address generated by the processor. If
the results of the two AND operations are equal, then the
generated physical address is considered within the range. That
is, if:
Mask & Physical Base Address = Mask & Physical Address Generated
then the physical address generated by the processor is in the
range.
WCn (n=0, 1).
When set to 1, this memory range is defined as
write-combinable (refer to Table 11). Write-combinable
memory is uncacheable.
16
0
63
Physical Address Mask 0
17
31
Physical Base Address 0
1
2
Physical Address Mask 1
Physical Base Address 1
32
33
34
48
49
U
C
0
W
C
0
U
C
1
W
C
1
MTRR1
MTRR0
Symbol
UC0
WC0
Description
Uncacheable Memory Type
Write-Combining Memory Type
Bits
0
1
Symbol
UC1
WC1
Description
Uncacheable Memory Type
Write-Combining Memory Type
Bits
32
33
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