參數(shù)資料
型號： 38D5
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 18/141頁
文件大?。?/td> 2027K
代理商： 38D5
Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 18 of 134
38D5 Group
Fig. 11 Memory map of special function register (SFR)
0000
16
0001
16
0002
16
0003
16
0004
16
0005
16
0006
16
0007
16
0008
16
0009
16
000A
16
000B
16
000C
16
000D
16
000E
16
000F
16
0010
16
0011
16
0012
16
0013
16
0014
16
0015
16
0016
16
0017
16
0018
16
0019
16
001A
16
001B
16
001C
16
001D
16
001E
16
001F
16
0020
16
0021
16
0022
16
0023
16
0024
16
0025
16
0026
16
0027
16
0028
16
0029
16
002A
16
002B
16
002C
16
002D
16
002E
16
002F
16
0030
16
0031
16
0032
16
0033
16
0034
16
0035
16
0036
16
0037
16
0038
16
0039
16
003A
16
003B
16
003C
16
003D
16
003E
16
003F
16
CPU mode register 2 (CPUM2)
RRF register (RRFR)
LCD mode register1 (LM1)
LCD mode register2 (LM2)
AD control register (ADCON)
AD conversion register (low-order) (ADL)
AD conversion register (high-order) (ADH)
Port P0 (P0)
Port P0 direction register (P0D)
Port P1 (P1)
Port P1 direction register (P1D)
Port P2 (P2)
Port P2 direction register (P2D)
Port P3 (P3)
Port P3 direction register (P3D)
Port P4 (P4)
Port P4 direction register (P4D)
Port P5 (P5)
Port P5 direction register (P5D)
Port P6 (P6)
Port P6 direction register (P6D)
Port P7 (P7)
Port P7 direction register (P7D)
Timer X (low-order) (TXL)
Timer X (high-order) (TXH)
Timer X (extension) (TXEX)
Timer X mode register (TXM)
Timer X control register 1 (TXCON1)
Timer X control register 2 (TXCON2)
Compare register 1 (low-order) (COMP1L)
Compare register 1 (high-order) (COMP1H)
Compare register 2 (low-order) (COMP2L)
Compare register 2 (high-order) (COMP2H)
Compare register 3 (low-order) (COMP3L)
Compare register 3 (high-order) (COMP3H)
Timer Y (low-order) (TYL)
Timer Y (high-order) (TYH)
Timer Y mode register (TYM)
Timer Y control register (TYCON)
Interrupt edge selection register (INTEDGE)
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
Transmit/receive buffer register 1 (TB1/RB1)
Serial I/O1 status register (SIO1STS)
Serial I/O1 control register (SIO1CON)
UART control register (UARTCON)
Baud rate generator (BRG)
Serial I/O2 control register (SIO2CON)
Reserved
Serial I/O2 register (SIO2)
Timer 1 (T1)
Timer 2 (T2)
Timer 3 (T3)
Timer 4 (T4)
PWM01 register (PWM01)
Timer 12 mode register (T12M)
Timer 34 mode register (T34M)
Timer 1234 mode register (T1234M)
Timer 1234 frequency division selection register (PRE1234)
Watchdog timer control register (WDTCON)
ROM correction address 1 high-order register (RCA1H)
ROM correction address 1 low-order register (RCA1L)
ROM correction address 2 high-order register (RCA2H)
ROM correction address 2 low-order register (RCA2L)
ROM correction enable register (RCR)
Reserved
(
1
)
0FF0
16
0FF1
16
0FF2
16
0FF3
16
0FF4
16
0FF5
16
0FF6
16
0FF7
16
0FF8
16
0FF9
16
0FFA
16
0FFB
16
0FFC
16
0FFD
16
0FFE
16
0FFF
16
PULL register 1 (PULL1)
PULL register 2 (PULL2)
PULL register 3 (PULL3)
Clock output control register (CKOUT)
Segment output disable register 0 (SEG0)
Segment output disable register 1 (SEG1)
Segment output disable register 2 (SEG2)
Key input control register (KIC)
Note1
: The blanks are reserved. Do not write data to these areas.
2
: No memory access is allowed to the blank areas within the SFRs.
3
: Addresses 0FE0
16
to 0FEF
16
are available in the flash memory version only.
(
1
)
0FE0
16
0FE1
16
0FE2
16
0FE3
16
0FE4
16
0FE5
16
0FE6
16
0FE7
16
0FE8
16
0FE9
16
0FEA
16
0FEB
16
0FEC
16
0FED
16
0FEE
16
0FEF
16
Flash memory control register 0 (FMCR0)
Flash memory control register 1 (FMCR1)
Flash memory control register 2 (FMCR2)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
(
1
)
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