參數(shù)資料
型號(hào): 38D5
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 7/141頁(yè)
文件大?。?/td> 2027K
代理商: 38D5
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Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 7 of 134
38D5 Group
PIN DESCRIPTION
Table 3
Pin description (1)
Pin
Name
Function
Function except a port function
V
CC
, V
SS
Power source
Reset input
Apply power source voltage to V
CC
, and 0 V to V
SS
.
Reset input pin for active “L”.
RESET
X
IN
X
OUT
Clock input
Clock output
Input and output pins for the main clock generating circuit.
Connect a ceramic resonator or a quartz-crystal oscillator between the X
IN
and X
OUT
pins to
set the oscillation frequency. When an external clock is used, connect the clock source to
X
IN
, and leave X
OUT
pin open.
Feedback resistor is built in between X
IN
pin and X
OUT
pin.
Input 0
V
L1
V
L2
V
L3
voltage.
Input 0
V
L3
voltage to LCD.
LCD common output pins.
COM
2
and COM
3
are not used at 1/2 duty ratio.
COM
3
is not used at 1/3 duty ratio.
LCD common/segment output pins.
V
L1,
V
L2,
V
L3
LCD power
source
Common output
COM
0
COM
3
COM
4
/
SEG
35
COM
7
/
SEG
32
P0
0
/SEG
8
P0
7
/SEG
15
Common output
Segment output
I/O port P0
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be
individually programmed as either input or output.
Pull-up control is enabled in a bit unit.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be
programmed as either input or output.
Pull-up control is enabled in 4-bit unit.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be
individually programmed as either input or output.
Pull-up control is enabled in a bit unit.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be
individually programmed as either input or output.
Pull-up control is enabled in 4-bit unit.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be
individually programmed as either input or output.
Pull-up control is enabled in 4-bit unit.
P1
0
/SEG
16
P1
7
/SEG
23
I/O port P1
P2
0
/SEG
0
/(KW
4
)
P2
3
/SEG
3
/(KW
7
)
P2
4
/SEG
4
P2
7
/SEG
7
I/O port P2
Key input interrupt
input pins
P3
0
/SEG
24
P3
7
/SEG
31
I/O port P3
P4
0
/R
X
D
P4
1
/T
X
D
P4
2
/S
CLK1
P4
3
/S
RDY1
P4
4
/S
IN2
/(KW
0
)
P4
5
/S
OUT2
/(KW
1
)
P4
6
/S
CLK2
/(KW
2
)
P4
7
/S
RDY2
/(KW
3
)
I/O port P4
Serial I/O1 function pins
Serial I/O2
function pins
Key input interrupt
input pins
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