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| 型號(hào)： | 38D5 |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 59/141頁(yè) |
| 文件大?。?/td> | 2027K |
| 代理商： | 38D5 |
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Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 59 of 134
38D5 Group
CLOCK OUTPUT FUNCTION
A system clock
φ
can be output from I/O port P7
2
. The triple
function of I/O port, timer 2 output function and system clock
φ
output function are controlled by the clock output control register
(address 0FF3
16
) and the timer 2 output selection bit of the timer
12 mode register (address 0025
16
).
In order to output a system clock
φ
from I/O port P7
2
, set the
timer 2 output selection bit to “1” and P7
2
clock output control
bits of the clock output control register to “01”. In order to output
the same signal as oscillation frequency of sub clock X
CIN
, set
the P7
2
clock output control bits to “10”. When the clock output
function is selected, a clock is output while the direction register
of port P7
2
is set to the output mode.
P7
2
is switched to the port output or the output (timer 2 output or
the clock output) except port at the cycle after the timer 2 output
selection bit is switched.
Fig. 54 Structure of clock output control register
Fig. 55 Block diagram of Clock output function
Other function registers
[RRF register (RRFR)]
The RRF register (address 0012
16
) is the 8-bit register and does
not have the control function.
As for the value written in this register, high-order 4 bits and
low-order 4 bits interchange.
It is initialized after reset.
Fig. 56 Structure of RRF register
b7 b0
Clock output control register
(CKOUT : address 0FF3
16
)
P7
2
clock output control bits
b1b0
0 0: Timer 2 output
0 1:
φ
frequency signal output
1 0: X
CIN
frequency signal output
1 1: Not available
Not used (returns “0” when read)
Timer 2 latch (8)
Timer 2 (8)
1/2
Q
Q
S
T
T
2OUT
output edge
switch bit
“0”
“1”
P7
2
latch
Timer 2 output selection bit
P7
2
direction register
P7
2
/T
2
OUT/CKOUT
b7 b0
Timer 12 mode register (address 0025
16
)
T12M
Timer 2 output selection bit
0 : I/O port
1 : Timer 2 output
System clock
φ
Timer 2 output selection bit
X
CIN
“00”
“01”
“10”
P7
2
clock output
control bits
b7
b0
RRF register
(RRFR : address 0012
16
)
DB
4
data storage
DB
5
data storage
DB
6
data storage
DB
7
data storage
DB
0
data storage
DB
1
data storage
DB
2
data storage
DB
3
data storage
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