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| 型號(hào)： | 38D5 |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機(jī) |
| 文件頁(yè)數(shù)： | 76/141頁(yè) |
| 文件大小： | 2027K |
| 代理商： | 38D5 |
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Rev.3.01
REJ03B0158-0301
Aug 08, 2007
Page 76 of 134
38D5 Group
Fig 73. Structure of flash memory control register 2
Figure 74 shows a flowchart for setting/releasing CPU rewrite mode.
Fig 74. CPU rewrite mode set/release flowchart be sure to execute
Flash memory control register 2
(FMCR2: address : 0FE2
16
, initial value: 45
16
)
Not used
Not used (do not write “1” to this bit.)
Not used
User block 0 E/W enable bit
(1, 2)
0 : E/W disabled
1 : E/W enabled
Not used
b7
b0
Notes 1
: For this bit to be set to “1”, the user needs to write a “0” and then a
“1” to it in succession. For this bit to be set to “0”, write “0” only to this
bit.
2
: Effective only when the CPU rewrite mode select bit = “1”.
Table 17
State of E/W inhibition function
User block 0
E/W enable bit
0
0
1
1
User block 1
E/W enable bit
0
1
0
1
User block 0
Addresses 8000
16
to FFFF
16
E/W disabled
E/W disabled
E/W disabled
E/W enabled
User block 1
Addresses 1800
16
to 7FFF
16
E/W disabled
E/W disabled
E/W enabled
E/W enabled
Data block
Addresses 1000
16
to 17FF
16
E/W enabled
E/W enabled
E/W enabled
E/W enabled
Start
Single-chip mode or Boot mode
Set CPU mode register
(1)
Jump to control program transferred to internal RAM
(Subsequent operations are executed by control program in
this RAM)
Transfer CPU rewrite mode control program to internal RAM
Set CPU rewrite mode select bit to “1” (by writing “0” and
Using software command executes erase, program, or other
operation
End
Write “0” to CPU rewrite mode select bit
Set user block 0 E/W enable bit to “1” (by writing “0” and
then “1” in succession)
Set user block 1 E/W enable bit (At E/W disabled; writing
“0” , at E/W enabled;
writing “0” and then “1” in succession
Execute read array command
(2)
Set user block 0 E/W enable bit to “0”
Set user block 1 E/W enable bit to “0”
Notes 1
: Set the main clock as follows depending on the clock division ratio selection bits of CPU mode register (bits 6, 7 of address 003B
16
).
2
: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to execute the read array command.
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