參數(shù)資料
型號： 78Q8430-ARM9-EVM
廠商： Maxim Integrated Products
文件頁數(shù)： 11/88頁
文件大?。?/td> 0K
描述： EVALUATION MODULE 78Q8430 ARM9
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 1
系列： *
DS_8430_001
78Q8430 Data Sheet
Rev. 1.2
19
4.4
Digital I/O Characteristics
Table 15: Digital I/O Characteristics
Parameter
Symbol
Conditions
Min
Nom
Max
Unit
Input Voltage Low
VIL
–
0.8
V
Input Voltage High
VIH
2.0
–
V
Input Current
IIL, IIH
-1
–
1
A
Input Capacitance
CIN
–
8
–
pF
Output Voltage Low
V
I
OL
–
= 8 mA
–
0.4
V
Output Voltage
High**
V
I
OH
2.4
= -8 mA
–
V
Output Transition
Time
T
C
T
L = 20 pF
IOH
–
= -8 ma (H to Z )
–
6
ns
Tri-state Output
Leakage Current*
I
Type tri-state only
Z
-1
–
1
A
**PMEB and INTB are active low outputs requiring external pull-up resistors. VOH
4.5
Analog Electrical Characteristics
for these outputs is not
specified.
4.5.1
100Base-TX Transmitter
Table 16: MII 100Base-TX Transmit Timing
Parameter
Conditions
Min
Nom
Max
Unit
Peak Output Amplitude (|VP+|, |VP
Best-fit over 14 bit times;
0.4 dB Transformer loss
-|)
(see note below)
950
–
1050
mVpk
Output Amplitude Symmetry
|VP +|
|VP
0.98
-|
–
1.02
Output Overshoot
Percent of VP+, VP
–
-
–
5
%
Rise/Fall time (tR, tF
10-90% of V
)
P+, VP
3
-
–
5
ns
Rise/Fall time Imbalance
|tR - tF
–
|
–
500
ps
Duty Cycle Distortion
Deviation from best-fit
time-grid;
010101... Sequence
–
±250
ps
Jitter
Scrambled Idle, Internal
Oscillator Mode
–
1.4
ns
Note: Measured at the line side of the transformer. Test Condition: Transformer P/N: TLA-6T103. Line
Termination: 100
Ω±1%
4.5.2
100Base-TX Transmitter (Informative)
Table 17: MII 100Base-TX Transmitter (Informative)
Parameter
Conditions
Min
Max
Unit
Return Loss
2 < f < 30 MHz
30 < f < 60 MHz
60 < f < 80 MHz
16
MHz
30
f
log
20
16
10
–
dB
Open-Circuit Inductance
-8 < IIN
350
< 8 mA
–
H
Note: The specifications in the preceding table are included for information only. They are mainly a
function of the external transformer and termination resistors used for measurements.
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