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| 型號： | 78Q8430-ARM9-EVM |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 75/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVALUATION MODULE 78Q8430 ARM9 |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
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DS_8430_001
78Q8430 Data Sheet
Rev. 1.2
77
Bits
Symbol
Type
Default Description
1
JAB
RC/LH
0
Jabber Detect
In 10Base-T mode, this bit is set during a jabber event. After
the event, the bit remains set until cleared by a read operation.
0
EXTD
R
1
Extended Capability
Reads 1 to indicate the 78Q8430 PHY provides an extended
register set (MR2 and beyond).
7.7.4
PHY Identifier Registers – MR2, MR3
MR2: PHY Identifier Register 1
Bits
Symbol
Type
Value
Description
15:0
OUI
[23:6]
R
000Eh
Organizationally Unique Identifier
This value is 00-C0-39 for Teridian Semiconductor Corporation.
This register contains 16 of the upper 18 bits of the identifier.
MR3: PHY Identifier Register 2
Bits
Symbol
Type
Value
Description
15:10
OUI
[5:0]
R
1Ch
Organizationally Unique Identifier
The remaining 6 bits of the 24-bit OUI.
9:4
MN
R
23h
Model Number
The 23 from the model number is encoded into the 6 bits.
3:0
RN
R
03h
Revision Number
The value 0011 corresponds to the third revision of the silicon.
7.7.5
PHY Auto-Negotiation Advertisement Registers – MR4
Bits
Symbol
Type
Default Description
15
NP
R
0
Next Page
Not supported. Reads logic zero.
14
RSVD
R
0
Reserved
13
RF
R/W
0
Remote Fault
Setting this bit to 1 allows the device to indicate to the link
partner a Remote Fault Condition.
12:5
TAF
R/W
(0Fh)
Technology Ability Field
The default value of this field is dependent upon the MR1.15:
11 register bits. This field can be overwritten by management
to auto-negotiate to an alternate common technology. Writing
to this register has no effect until auto-negotiation is re-initiated.
12
A7
R
0
Reserved
11
ASYMP
R/W
0
Asymmetric PAUSE Operation for Full Duplex Links
0 = Asymmetric PAUSE operation not supported
1 = Asymmetric PAUSE operation is supported
Writing to this register has no effect until auto-negotiation is
re-initiated.
10
PAUSE
R/W
0
PAUSE Operation for Full Duplex Links
0 = PAUSE operation not supported
1 = PAUSE operation is supported
Writing to this register has no effect until auto-negotiation is
re-initiated.
9
A4
R
0
100BASE-T4
The 78Q8430 PHY does not support 100BASE-T4 operations.
8
A3
R/W
1
100BASE-TX Full Duplex
This bit will be set to 1 upon reset and is writeable. Writing to
this register has no effect until auto-negotiation is re-initiated.
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參數(shù)描述 |
|---|---|
| 78Q8430EBST#DB | 功能描述:以太網(wǎng)開發(fā)工具 3-in-1 Silicon Delay Line RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| 78Q8430STEM#DB | 功能描述:以太網(wǎng)開發(fā)工具 3-in-1 Silicon Delay Line RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| 78-R3 | 功能描述:3M SCOTCHCAST REENTERABLE SIGNAL 制造商:3m 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
| 78-R4 | 功能描述:3M SCOTCHCAST REENTERABLE SIGNAL 制造商:3m 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:1 |
| 78RB02 | 功能描述:SWITCH 2 POS DIP RECESSED UNSLD RoHS:否 類別:開關(guān) >> DIP 系列:78 特色產(chǎn)品:RDM Series Rotary DIP Switch 標(biāo)準(zhǔn)包裝:70 系列:RDM 電路:十六進(jìn)制 位置數(shù):16 觸點額定電壓:0.1A @ 42VDC 觸動器類型:用于工具旋轉(zhuǎn) 觸動器電平:凹槽式 安裝類型:通孔 方向:頂部觸動 可清洗:是 其它名稱:EG4977-5RDMAR16PIT |
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