參數(shù)資料
型號： 80546KF
廠商： Intel Corp.
英文描述： 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache
中文描述： 64位Intel Xeon處理器MP的高達(dá)8MB三級高速緩存
文件頁數(shù)： 117/138頁
文件大小： 2666K
代理商： 80546KF
64-bit Intel
Xeon Processor MP with up to 8MB L3 Cache Datasheet
117
Features
8.4.6.4
Configuration Register
The Configuration Register controls the operating mode (stand-by vs. auto-convert) of the SMBus
thermal sensor.
Table 8-13
shows the format of the Configuration Register. If the RUN/STOP bit is
set (high) then the thermal sensor immediately stops converting and enters stand-by mode. The
thermal sensor will still perform analog to digital conversions in stand-by mode when it receives a
one-shot command. If the RUN/STOP bit is clear (low), then the thermal sensor enters auto-
conversion mode.
This register is accessed by using the thermal sensor Command Register. The RC command
register is used for read commands and the WC command register is used for write commands. See
Table 8-10
.
Table 8-12. SMBus Thermal Sensor Status Register
Bit
Name
Reset State
Function
7 (MSB)
BUSY
N/A
If set, indicates that the device’s analog to digital
converter is busy.
6
RESERVED
RESERVED
Reserved for future use
5
RESERVED
RESERVED
Reserved for future use
4
RHIGH
0
If set, indicates the processor core thermal diode
high temperature alarm has activated.
3
RLOW
0
If set, indicates the processor core thermal diode
low temperature alarm has activated.
2
OPEN
0
If set, indicates an open fault in the connection to
the processor core diode.
1
RESERVED
RESERVED
Reserved for future use.
0 (LSB)
RESERVED
RESERVED
Reserved for future use.
Table 8-13. SMBus Thermal Sensor Configuration Register
Bit
Name
Reset State
Function
7 (MSB)
MASK
0
Mask SM_ALERT# bit. Clear the bit to allow
interrupts via SM_ALERT# and allow the thermal
sensor to respond to the ARA command when
an alarm is active. Set the bit to disable interrupt
mode. The bit is not used to clear the state of the
SM_ALERT# output. An ARA command may not
be recognized if the mask is enabled.
6
RUN/STOP
0
Stand-by mode control bit. If set, the device
immediately stops converting, and enters stand-
by mode. If cleared, the device converts in either
one-shot mode or automatically updates on a
timed basis.
5:0
RESERVED
RESERVED
Reserved for future use.
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