參數(shù)資料
型號： 80546KF
廠商： Intel Corp.
英文描述： 64-bit Intel Xeon Processor MP with up to 8MB L3 Cache
中文描述： 64位Intel Xeon處理器MP的高達8MB三級高速緩存
文件頁數(shù)： 54/138頁
文件大?。?/td> 2666K
代理商： 80546KF
54
64-bit Intel
Xeon Processor MP with up to 8MB L3 Cache Datasheet
Front Side Bus Signal Quality Specifications
NOTES:
1. All signal integrity specifications are measured at the processor core (pads).
2. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
3. Specifications are for the edge rate of 1.8- 2.2V/ns.
4. All values specified by design characterization.
5. Please see
Section 3.1.3
for maximum allowable overshoot.
6. The total ringback tolerance is 6% of V
TT
(0.06 * V
). This consists of 4% AC and 2% DC components.
Ringback between GTLREF + (0.06 * V
TT
) and GTLREF - (0.06 * V
TT
) is not supported.
Table 3-1. Ringback Specifications for AGTL+ and GTL+ Asynchronous Signal Groups
Signal Group
Transition
Maximum Ringback
(with Input Diodes Present)
Unit
Figure
Notes
AGTL+, Async GTL+
Low
→
High
High
→
Low
GTLREF + (0.06 * V
TT
)
GTLREF - (0.06 * V
TT
)
V
3-1
1,2,3,4,5,6
AGTL+, Async GTL+
V
3-2
1,2,3,4,5,6
Figure 3-1. Low-to-High Front Side Bus Receiver Ringback Tolerance
GTLREF
– 6% * V
TT
V
TT
Noise Margin
+ 6% * V
TT
V
SS
Figure 3-2. High-to-Low Front Side Bus Receiver Ringback Tolerance
GTLREF
- 6% * V
TT
Noise Margin
+ 6% * V
TT
V
TT
V
SS
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