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參數(shù)資料
| 型號(hào)： | AD6635BB |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | 4-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PBGA324 |
| 封裝： | 19 X 19 MM, PLASTIC, BGA-324 |
| 文件頁數(shù)： | 58/60頁 |
| 文件大?。?/td> | 799K |
| 代理商： | AD6635BB |
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REV. 0
–58–
AD6635
INTERNAL WRITE ACCESS
Up to 20 bits of data (as needed) can be written by the process
described below. Any high order bytes that are needed are writ-
ten to the corresponding data registers defined in the external
3-bit address space. The least significant byte is then written to
DR0 at address (000). When a write to DR0 is detected, the
internal microprocessor port state machine then moves the data
in DR2–DR0 to the internal address pointed to by the address
in the LAR and AMR.
Write Pseudocode
void write_micro(ext_address, int data);
main();
{
/* This code shows the programming of the NCO
phase offset register using the write_micro
function as defined above. The variable address
is the External Address A[2:0] and data is the
value to be placed in the external interface
register.
Internal Address = 0x87 */
// holding registers for NCO phase byte wide
access data
int d1, d0;
// NCO phase word (16-bits wide)
NCO_PHASE = 0xCBEF;
// write ACR
write_micro(7, 0x03 );
// write CAR
write_micro(6, 0x87);
// write DR1 with D[15:8]
d1 = (NCO_PHASE & 0xFF00) >> 8;
write_micro(1, d1);
// write DR0 with D[7:0]
// On this write all data is transferred to the
internal address
d0 = NCO_PHASE & 0xFF;
write_micro(0, d0);
} // end of main
INTERNAL READ ACCESS
A read is performed by first writing the CAR and AMR, as with
a write. The data registers (DR2–DR0) are then read in the
reverse order that they were written. First, the least significant
byte of the data (D[7:0]) is read from DR0. On this transac-
tion, the high bytes of the data are moved from the internal
address pointed to by the CAR and AMR into the remaining
data registers (DR2–DR1). This data can then be read from the
data registers using the appropriate 3-bit addresses. The num-
ber of data registers used depends solely on the amount of data
to be read or written. Any unused bit in a data register should
be masked out for a read.
Read Pseudocode
int read_micro(ext_address);
main();
{
/* This code shows the reading of the first
RCF coefficient using the read_micro function
as defined above. The variable address is the
External Address A[2..0].
Internal Address = 0x000
*/
// holding registers for the coefficient
int d2, d1, d0;
// coefficient (20-bits wide)
long coefficient;
// write AMR
write_micro(7, 0x00 );
// write LAR
write_micro(6, 0x00);
/* read D[7:0] from DR0, All data is moved
from the Internal Registers to the interface
registers on this access */
d0 = read_micro(0) & 0xFF;
// read D[15:8] from DR1
d1 = read_micro(1) & 0xFF;
// read D[23:16] from DR2
d2 = read_micro(2) & 0x0F;
coefficient = d0 + (d1 << 8) + (d2 << 16);
} // end of main
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| AD6636BC | 150 MSPS Wideband Digital Down-Converter (DDC) |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD6635BB/PCB | 制造商:Analog Devices 功能描述:Evaluation Kit For 4-Channel, 80MSPS WCDMA Receive Signal Processor |
| AD6635BBZ | 制造商:Analog Devices 功能描述:Receive Signal Processor 324-Pin BGA |
| AD6636 | 制造商:AD 制造商全稱:Analog Devices 功能描述:150 MSPS Wideband Digital Down-Converter (DDC) |
| AD6636BBC | 制造商:Analog Devices 功能描述:Digital Down Converter 256-Pin CSP-BGA |
| AD6636BBCZ | 功能描述:IC DIGITAL DWNCONV 6CH 256CSPBGA RoHS:是 類別:RF/IF 和 RFID >> RF 混頻器 系列:AD6636 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- RF 型:W-CDMA 頻率:2.11GHz ~ 2.17GHz 混頻器數(shù)目:1 增益:17dB 噪音數(shù)據(jù):2.2dB 次要屬性:- 電流 - 電源:11.7mA 電源電壓:2.7 V ~ 3.3 V 包裝:托盤 封裝/外殼:12-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:12-QFN-EP（3x3） |
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