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參數(shù)資料
| 型號： | AD6636CBCZ1 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數(shù)字上／下變頻 |
| 英文描述： | 150 MSPS Wideband Digital Down-Converter (DDC) |
| 中文描述： | 150MSPS的寬帶數(shù)字下變頻器（DDC） |
| 文件頁數(shù)： | 38/72頁 |
| 文件大小： | 1629K |
| 代理商： | AD6636CBCZ1 |
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AD6636
The interleaving function is a simple time-multiplexing
function, with lower data rate on the input side and higher data
rate on the output side. The output data rate is the sum of all
input stream data rates that are combined.
Rev. 0 | Page 38 of 72
The channels that need to be combined are programmable with
sufficient flexibility. Table 22 gives the combinations that are
possible using a 4-bit word (stream control bits) in the Parallel
Port Control 2 register.
After interleaving of data (see the Output Data Router section),
the data is passed to the second subblock, in which either
complex filter completion or biphase filtering can be
performed.
Complex Filter Completion
In normal operation, each individual channel’s filter performs
real coefficient, complex data filtering.
Two channels are used to perform complex coefficient data
filtering. One channel is loaded with the real part (in-phase) of
the coefficients; the other channel is loaded with the imaginary
part (quadrature) of the coefficients.
The terms calculated are as follows:
(ICi, QCi) from first channel
(Icq, QCq) from the second channel
Using these terms, the complex filter is completed by applying
the following formula:
(
I
+
jQ
) (
Ci
+
jCq
) = (
ICi
QCq
) +
j
(
ICq
+
QCi
)
The channels to be combined can be programmed using a 3-bit
complex control word in the Parallel Output Control 2 register.
The values for the 3-bit control word and the corresponding
settings are listed in Table 23.
These outputs go to the six available AGCs. Not all AGCs need
to be used in the different applications, so unused AGCs can be
bypassed and the output data streams ignored by the parallel
output ports. For example, if Streams 0 and 1 are combined for a
complex filter, AGC 1 can be bypassed, because Stream 1 is
already combined into Stream 0 and sent to AGC 0.
Table 22. Stream Control Bit Combinations
Stream Control Bits
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
Any other state
Output Streams
Ch 0/1 combined, Ch 2, Ch 3, Ch 4, Ch 5 independent
Ch 0/1/2 combined, Ch 3, Ch 4, Ch5 independent
Ch 0/1/2/3 combined; Ch 4, Ch 5 independent
Ch 0/1/2/3/4 combined; Ch 5 independent
Ch 0/1/2/3/4/5 combined
Ch 0/1/2 combined, Ch 3/4/5 combined
Ch 0/1 combined, Ch 2/3 combined, Ch 4/5 combined
Ch 0/1 combined, Ch 2/3 combined, Ch 4, Ch 5 independent
Ch 0/1/2 combined, Ch 3/4 combined, Ch 5 independent
Ch 0/1/2/3 combined, Ch 4/5 combined.
Independent channels
No. of Streams
5
4
3
2
1
2
3
3
3
2
6
Table 23. Definitions for Complex Control Register Selections
Complex Control Word
Data Routing
000
No complex filters
001
Stream 0/1 combined
010
Stream 0/1 combined, Stream 2/3
combined
011
Stream 0/1 combined, Stream 2/3
combined, Stream 4/5 combined
101
Stream 0/1 Combined
110
Stream 0/1 combined, Stream 2/3
combined
111
Stream 0/1 combined, Stream 2/3
combined, Stream 4/5 combined
Comments
Stream control register controls AGC usage.
Allows Ch 0 and Ch 1 to form a complex filter.
Allows Ch 0 and Ch 1 to form a complex filter and Ch 2 and Ch 3 to
form a complex filter.
Allows Ch 0 and Ch 1 to form a complex filter, Ch 2 and Ch 3 to form a
complex filte,r and Ch 4 and Ch 5 to form a complex filter.
Allows Ch 0 and Ch 1 to form a biphase filter.
Allows Ch 0 and Ch 1 to form a biphase filter, and Ch 2 and Ch 3 to
form a biphase filter.
Allows Ch 0 and Ch 1 to form a biphase filter, Ch 2 and Ch 3 to form a
biphase filter, and Ch 4 and Ch 5 to form a biphase filter.
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