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參數資料
| 型號： | AD6636CBCZ1 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 數字上／下變頻 |
| 英文描述： | 150 MSPS Wideband Digital Down-Converter (DDC) |
| 中文描述： | 150MSPS的寬帶數字下變頻器（DDC） |
| 文件頁數： | 42/72頁 |
| 文件大小： | 1629K |
| 代理商： | AD6636CBCZ1 |
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AD6636
The relationship between the time constant and the closed-loop
poles that can be used for this purpose is
Rev. 0 | Page 42 of 72
τ
×
=
2
1,
CIC
Rate
2
1,
Sample
M
P
exp
where
are the time constants corresponding to poles
P
1, 2
.
2
1
,
τ
The time constants can also be derived from settling times as
given by
3
%
5
4
%
2
time
settling
or
time
settling
=
τ
M
CIC
(CIC decimation is from 1 to 4,096), and either the settling
time or time constant are chosen by the user. The sample rate is
the sample rate of the stream coming into the AGC. If channels
were interleaved in the output data router, then the combined
sample rate into the AGC should be considered. This rate
should be used in the calculation of poles in the previous
equation, where the sample rate is mentioned.
The loop filter output corresponds to the signal gain that is
updated by the AGC. Because all computation in the loop filter
is done in logarithmic domain (to the Base 2) of the samples,
the signal gain is generated using the exponent (power of 2) of
the loop filter output.
The gain multiplier gives the product of the signal gain with
both the I and Q data entering the AGC section. This signal
gain is applied as a coarse 4-bit scaling and then as a fine scale
8-bit multiplier. Therefore, the applied signal gain is from 0 to
96.3 dB in steps of 0.024 dB. The initial signal gain is program-
mable using the AGC signal gain register. This register is again a
4 exponent + 8 mantissa bit floating-point representation
similar to the error threshold. This is taken as the initial gain
value before the AGC loop starts operating.
The products of the gain multiplier are the AGC scaled outputs
with a 19-bit representation. These are in turn used as I and Q
for calculating the power, and the AGC error and loop are
filtered to produce the signal gain for the next set of samples.
These AGC scaled outputs can be programmed to have 4-, 5-,
6-, 7-, 8-, 10-, 12-, or 16-bit widths by using the AGC output
word length word in the AGC control register. The AGC scaled
outputs are truncated to the required bit widths by using the
clipping circuitry, as shown in Figure 39.
Average Samples Setting
Though it is complicated to express the exact effect of the
number of averaging samples by using equations, intuitively it
has a smoothing effect on the way the AGC loop addresses a
sudden increase or a spike in the signal level. If averaging of
four samples is used, the AGC addresses a sudden increase in
signal level more slowly compared to no averaging. The same
applies to the manner in which the AGC addresses a sudden
decrease in the signal level.
Desired Clipping Level Mode
Each AGC can be configured so that the loop locks onto a
desired clipping level or a desired signal level. Desired clipping
level mode is selected by writing Logic 1 in the AGC clipping
error mode bit in the AGC control register. For signals that tend
to exceed the bounds of the peak-to-average ratio, the desired
clipping level option provides a way to prevent truncating those
signals and still provide an AGC that attacks quickly and sett
to the desired output level. The signal path for this mode of
operation is shown with dotted lines in Figu
is similar to the desired signal level mode.
les
re 39; the operation
er
rror
ce of
n error term to be processed by the second-
subtracted, leaving a
order loop filter.
he
d
is
sired level registers instead of in the
op
C
ed by setting the appropriate bits of
the AGC control register.
nchronize the
Sync now bit: Through the AGC control register.
First, the data from the gain multiplier is truncated to a low
resolution (4, 5, 6, 7, 8, 10, 12, or 16 bits) as set by the AGC
output word length word in the AGC control register. An e
term (for both I and Q) is generated that is the difference
between the signals before and after truncation. This term is
passed to the complex squared magnitude block, for averaging
and decimating the update samples and taking their square root
to find rms samples as in desired signal level mode. In pla
the request desired signal level, a desired clipping level is
The rest of the loop operates the same way as the desired signal
level mode. This way, the truncation error is calculated and t
AGC loop operates to maintain a constant truncation error
level. The only register setting that is different from the desire
signal level mode settings is that the desired clipping level
stored in the AGC de
request signal level.
AGC Synchronization
When the AGC output is connected to a RAKE receiver, the
RAKE receiver can synchronize the average and update section
to update the average power for AGC error calculation and lo
filtering. This external sync signal synchronizes the AGC
changes to the RAKE receiver and makes sure that the AG
gain word does not change over a symbol period, which,
therefore, provides a more accurate estimation. This synchro-
nization can be accomplish
Sync Select Alternatives
The AGC can receive a sync as follows:
Channel sync: The sync signal is used to sy
NCO of the channel under consideration.
Pin sync: Select one of the four SYNC pins.
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