參數(shù)資料
型號(hào): AD6636CBCZ1
廠商: Analog Devices, Inc.
元件分類: 數(shù)字上/下變頻
英文描述: 150 MSPS Wideband Digital Down-Converter (DDC)
中文描述: 150MSPS的寬帶數(shù)字下變頻器(DDC)
文件頁數(shù): 48/72頁
文件大?。?/td> 1629K
代理商: AD6636CBCZ1
AD6636
Rev. 0 | Page 48 of 72
Hop with Soft Sync
The AD6636 can synchronize a change in NCO frequency
and/or phase offset of multiple channels or chips under
microprocessor control. The NCO hop hold-off counter, in
conjunction with the soft hop enable bit and the channel enable
bits, enables this synchronization.
To synchronize the hop of multiple channels via microprocessor
control:
1.
Write the NCO frequency register(s) or phase offset
register(s) to the new value.
2.
Write the NCO frequency hold-off counter(s) to the
appropriate value (greater than 1 and less than 2^16).
3.
Write the soft hop synchronization enable bit and the
corresponding soft sync channel enable bits high in the soft
synchronization configuration register. This starts the
countdown by the frequency hold-off counter. When the
count reaches 1, the new frequency and/or phase offset is
loaded into the NCO.
Hop with Pin Sync
Four sync pins (0, 1, 2 and 3) provide very accurate synchro-
nization among channels. Each channel can be programmed to
look at any of the four sync pins.
To control the hop of channel NCO frequencies:
1.
Write the NCO frequency register(s) or phase offset
register(s) to the new value.
2.
Write the NCO frequency hold-off counter(s) to the
appropriate value (greater than 1 and less than 2
16
).
3.
Program the channel NCO control registers to monitor the
appropriate SYNC pins.
4.
Write the hop synchronization enable bit and SYNC pin
enable bits high in the pin synchronization configuration
register. This enables the countdown of the frequency
hold-off counter. When the reaches 1, the new frequency
and/or phase offset is loaded into the NCO.
SERIAL PORT CONTROL
The AD6636 serial port allows the programming and readback
of all control registers and coefficient memory, serially, in 1-byte
words. The serial port can work in two modes, selected using
the MODE pin (SPI = 0, SPORT = 1). In both SPI and SPORT
modes, the AD6636 is compatible with Blackfin, TigerSHARC,
and other DSPs. The serial port and microport share some of
the I/O pins; therefore, only one of these ports is operational at
a time.
The selection between the serial port and microport modes is
made using the SMODE pin (serial port = 1, microport = 0).
The serial port has a chip select pin (active low signal), which
should be pulled low for any operation on the serial port. Serial
data can be shifted into the part or out of the part as either MSB
first or LSB first using the MSBFIRST pin (1 = MSB first, 0 =
LSB first).
Hardware Interface
The pins listed in Table 25 comprise the physical interface
between the user’s programming device and the AD6636 serial
port. All serial pins are inputs except for SDO, which is an open-
drain output and should be pulled high by an external pull-up
resistor (typical value of 1 k).
Table 25. Serial Port Pin Names and Functions
Pin Name
Function
SCLK
Serial clock in both SPI and SPORT modes. Serial data is clocked in on the rising edge of SCLK.
MSBFIRST
Indicates whether the first bit shifted in or out of the serial port is the MSB (1) or LSB (0) of the data word.
STFS
Serial transmit frame sync in SPORT mode; ignored in SPI mode.
SRFS
Serial receive frame sync in SPORT mode; ignored in SPI mode.
SDI
Serial data input in both modes.
SDO
Serial data output in both modes.
SCS
Active low serial chip select in both modes. Setting this pin high holds the serial port in reset. It should be pulled low for
any read/write operation on serial port.
SMODE
Serial mode. Partis programmed through the serial port when this pin is Logic 1.
MODE
Mode pin. Selects between SPI (0) and SPORT (1) modes.
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