參數(shù)資料
型號(hào)： AD9852/PCBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 23/52頁(yè)
文件大小： 0K
描述： BOARD EVAL FOR AD9852
設(shè)計(jì)資源： AD9852 Eval Brd BOM
AD9852 Schematic
標(biāo)準(zhǔn)包裝： 1
系列： AgileRF™
類型： 合成器
適用于相關(guān)產(chǎn)品： AD9852
相關(guān)產(chǎn)品： AD9852ASVZ-ND - IC DDS SYNTHESIZER CMOS 80-TQFP
AD9852ASTZ-ND - IC DDS SYNTHESIZER CMOS 80-LQFP
AD9852
Rev. E | Page 3 of 52
REVISION HISTORY
5/07—Rev. D to Rev. E
Changed AD9852ASQ to AD9852ASVZ ....................... Universal
Changed AD9852AST to AD9852ASTZ......................... Universal
Change to Features............................................................................1
Changes to Endnote 10 of Table 1...................................................7
Changes to Absolute Maximum Ratings........................................8
Added Thermal Resistance Section ................................................8
Change to Ramped FSK (Mode 010) Section..............................19
Change to Internal and External Update Clock Section............27
Change to Thermal Impedance Section.......................................38
Changes to Junction Temperature Considerations Section.......38
Changes to Thermally Enhanced Package Mounting
Guidelines Section......................................................................40
Deleted Figure 61 to Figure 64 ......................................................41
Changes to Table 14 ........................................................................44
Updated Outline Dimensions........................................................51
Changes to Ordering Guide...........................................................52
12/05—Rev. C to Rev. D
Updated Format.................................................................. Universal
Changes to General Description .....................................................4
Changes to Explanation of Test Levels Section .............................9
Change to Pin Configuration ........................................................10
Changes to Figure 65 ......................................................................47
Changes to Outline Dimensions ...................................................52
Changes to Ordering Guide...........................................................52
4/04—Rev. B to Rev. C
Updated Format.................................................................. Universal
Changes to Figure 1...........................................................................1
Changes to General Description .....................................................3
Changes to Table 1 ............................................................................4
Changes to Footnote 2 ......................................................................6
Changes to Figure 2...........................................................................8
Changes to Table 5 ..........................................................................17
Changes to Equation in Ramped FSK (Mode 010).....................19
Changes to Evaluation Board Instructions ..................................39
Changes to General Operating Instructions Section..................39
Changes to Using the Provided Software Section.......................42
Changes to Figure 65 ......................................................................43
Changes to Figure 66 ......................................................................44
Changes to Figure 72 and Figure 73 .............................................48
Changes to Ordering Guide...........................................................48
3/02—Rev. A to Rev. B
Changes to General Description .....................................................1
Changes to Functional Block Diagram ..........................................1
Changes to Specifications ................................................................3
Changes to Absolute Maximum Ratings........................................5
Changes to Pin Function Descriptions ..........................................6
Changes to Figure 3 ..........................................................................8
Deleted Two TPCs ..........................................................................11
Changes to Figure 18 and Figure 19 .............................................11
Changes to BPDK Mode Section ..................................................21
Changes to Differential Refclk Enable Section ...........................24
Changes to Master Reset Section ..................................................24
Changes to Parallel I/O Operation Section .................................24
Changes to General Operation of the Serial
Interface Section..............................................................................27
Changes to Figure 50 ......................................................................27
Changes to Figure 65 ......................................................................36
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