參數(shù)資料
型號: AD9852/PCBZ
廠商: Analog Devices Inc
文件頁數(shù): 9/52頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD9852
設(shè)計資源: AD9852 Eval Brd BOM
AD9852 Schematic
標(biāo)準(zhǔn)包裝: 1
系列: AgileRF™
類型: 合成器
適用于相關(guān)產(chǎn)品: AD9852
相關(guān)產(chǎn)品: AD9852ASVZ-ND - IC DDS SYNTHESIZER CMOS 80-TQFP
AD9852ASTZ-ND - IC DDS SYNTHESIZER CMOS 80-LQFP
AD9852
Rev. E | Page 17 of 52
TUNING
WORD
LOOP
FILTER
PHASE
COMPARATOR
REFERENCE
CLOCK
RF FREQUENCY
OUT
FILTER
AD9852
DDS
DIVIDE-BY-N
VCO
00634-
029
Figure 29. Agile High Frequency Synthesizer
REFERENCE
CLOCK
50
Ω
1:1 TRANSFORMER
THAT IS, Mini-Circuits T1-1T
FILTER
50
Ω
DIFFERENTIAL
TRANSFORMER-COUPLED
OUTPUT
AD9852
DDS
IOUT
0
063
4-
030
Figure 30. Differential Output Connection for Reduction of Common-Mode Signals
μPROCESSOR/
CONTROLLER
FPGA, ETC.
RSET
8-BIT PARALLEL OR
SERIAL PROGRAMMING
DATA AND CONTROL
SIGNALS
AD9852
CMOS LOGIC CLOCK OUT
REFERENCE
CLOCK
300MHz MAX DIRECT
MODE OR 15MHz TO 75MHz
MAX IN THE 4
× TO 20× CLOCK
MULTIPLIER MODE
2k
Ω
COSINE
DAC
NOTES
1. IOUT = APPROXIMATELY 20mA MAX WHEN RSET = 2kΩ.
2. SWITCH POSITION 1 PROVIDES COMPLEMENTARY
SINUSOIDAL SIGNALS TO THE COMPARATOR TO
PRODUCE A FIXED 50% DUTY CYCLE FROM THE
COMPARATOR.
3. SWITCH POSITION 2 PROVIDES A USER-PROGRAMMABLE
DC THRESHOLD VOLTAGE TO ALLOW SETTING OF THE
COMPARATOR DUTY CYCLE.
LOW-PASS
FILTER
LOW-PASS
FILTER
CONTROL
DAC
1
2
00634-031
Figure 31. Frequency Agile Clock Generator Applications for the AD9852
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