Parameter1
參數(shù)資料
型號: ADSP-21469KBCZ-3
廠商: Analog Devices Inc
文件頁數(shù): 10/72頁
文件大?。?/td> 0K
描述: IC DSP 32/40BIT 400MHZ 324BGA
產(chǎn)品變化通告: Pin Function Change 08/Mar/2012
標(biāo)準(zhǔn)包裝: 1
系列: SHARC®
類型: 浮點(diǎn)
接口: DAI,DPI,EBI/EMI,I²C,SCI,SPI,SSP,UART/USART
時鐘速率: 400MHz
非易失內(nèi)存: 外部
芯片上RAM: 5Mb
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.05V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 324-BGA,CSPBGA
供應(yīng)商設(shè)備封裝: 324-CSPBGA
包裝: 托盤
Rev. 0
|
Page 18 of 72
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June 2010
ADSP-21469
ELECTRICAL CHARACTERISTICS
450 MHz
400 MHz
Unit
Parameter1
Description
Test Conditions
Min
Max
Min
Max
VOH
2
High Level Output
Voltage
@ VDD_EXT = Min, IOH = –1.0 mA
3
2.4
V
VOL
2
Low Level Output
Voltage
@ VDD_EXT = Min, IOL = 1.0 mA
3
0.4
V
VOH_DDR2
High Level Output
Voltage for DDR2
@ VDD_DDR = Min, IOH = –13.4
mA
1.4
V
VOL_DDR2
Low Level Output
Voltage for DDR2
@ VDD_DDR = Min, IOL = 13.4 mA
0.29
V
IIH
4, 5
High Level Input
Current
@ VDD_EXT = Max, VIN = VDD_EXT
10
μA
IIL
Low Level Input
Current
@ VDD_EXT = Max, VIN = 0 V
10
μA
Low Level Input
Current Pull-up
@ VDD_EXT = Max, VIN = 0 V
200
μA
IIHPD
High Level Input
Current Pull-down
@ VDD_EXT = Max, VIN = VDD_EXT
Max
200
μA
IOZH
7, 8
Three-State Leakage
Current
@ VDD_EXT/VDD_DDR = Max,
VIN = VDD_EXT/VDD_DDR Max
10
μA
IOZL
Three-State Leakage
Current
@ VDD_EXT/VDD_DDR = Max,
VIN = 0 V
10
μA
IOZLPU
Three-State Leakage
Current Pull-up
@ VDD_EXT = Max, VIN = 0 V
200
μA
IOZHPD
Three-State Leakage
Current Pull-down
@ VDD_EXT = Max,
VIN = VDD_EXT Max
200
μA
IDD-INTYP
10, 11
Supply Current
(Internal)
fCCLK > 0 MHz
Table 13 × ASF
Table 13 × ASF
mA
IDD_A
12
Supply Current
(Analog)
VDD_A = Max
10
mA
CIN
13, 14
Input Capacitance
TCASE = 25°C5
5
pF
1 Specifications subject to change without notice.
2 Applies to output and bidirectional pins: AMI_ADDR23-0, AMI_DATA7-0, AMI_RD, AMI_WR, FLAG3–0, DAI_Px, DPI_Px, EMU, TDO.
3 See Output Drive Currents on Page 58 for typical drive current capabilities.
4 Applies to input pins: BOOTCFGx, CLKCFGx, TCK, RESET, CLKIN.
5 Applies to input pins with internal pull-ups: TRST, TMS, TDI.
6 Applies to input pins with internal pull-downs: MLBCLK
7 Applies to three-statable pins: all DDR2 pins.
8 Applies to three-statable pins with pull-ups: DAI_Px, DPI_Px, EMU.
9 Applies to three-statable pins with pull-downs: MLBDAT, MLBSIG, MLBDO, MLBSO, LDAT07-0, LDAT17-0, LCLK0, LCLK1, LACK0, LACK1.
10Typical internal current data reflects nominal operating conditions.
11See Engineer-to-Engineer Note “Estimating Power Dissipation for ADSP-2146x SHARC Processors” for further information.
12Characterized but not tested.
13Applies to all signal pins.
14Guaranteed, but not tested.
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