參數(shù)資料
型號(hào)： ADSP-21469KBCZ-3
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 54/72頁(yè)
文件大小： 0K
描述： IC DSP 32/40BIT 400MHZ 324BGA
產(chǎn)品變化通告： Pin Function Change 08/Mar/2012
標(biāo)準(zhǔn)包裝： 1
系列： SHARC®
類型： 浮點(diǎn)
接口： DAI，DPI，EBI/EMI，I²C，SCI，SPI，SSP，UART/USART
時(shí)鐘速率： 400MHz
非易失內(nèi)存： 外部
芯片上RAM： 5Mb
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.05V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 324-BGA，CSPBGA
供應(yīng)商設(shè)備封裝： 324-CSPBGA
包裝： 托盤(pán)
Rev. 0
|
Page 58 of 72
|
June 2010
ADSP-21469
TEST CONDITIONS
The ac signal specifications (timing parameters) appear in
output disable time, output enable time, and capacitive loading.
The timing specifications for the SHARC apply for the voltage
reference levels in Figure 44.
Timing is measured on signals when they cross the VMEAS level
as described in Figure 45. All delays (in nanoseconds) are mea-
sured between the point that the first signal reaches VMEAS and
the point that the second signal reaches VMEAS. The value of
VMEAS is 1.5 V for non-DDR pins and 0.9 V for DDR pins.
OUTPUT DRIVE CURRENTS
Figure 46 and Figure 46 shows typical I-V characteristics for the
output drivers of the ADSP-21469, and Table 55 shows the pins
associated with each driver. The curves represent the current
drive capability of the output drivers as a function of output
voltage.
Figure 44. Equivalent Device Loading for AC Measurements
(Includes All Fixtures)
Figure 45. Voltage Reference Levels for AC Measurements
T1
ZO = 50
: (impedance)
TD = 4.04
r 1.18 ns
2pF
TESTER PIN ELECTRONICS
50
:
0.5pF
70
:
400
:
45
:
4pF
NOTES:
THE WORST-CASE TRANSMISSION LINE DELAY IS SHOWN AND CAN BE USED
FOR THE OUTPUT TIMING ANALYSIS TO REFLECT THE TRANSMISSION LINE
EFFECT AND MUST BE CONSIDERED. THE TRANSMISSION LINE (TD) IS FOR
LOAD ONLY AND DOES NOT AFFECT THE DATA SHEET TIMING SPECIFICATIONS.
ANALOG DEVICES RECOMMENDS USING THE IBIS MODEL TIMING FOR A GIVEN
SYSTEM REQUIREMENT. IF NECESSARY, A SYSTEM MAY INCORPORATE
EXTERNAL DRIVERS TO COMPENSATE FOR ANY TIMING DIFFERENCES.
VLOAD
DUT
OUTPUT
50
:
INPUT
OR
OUTPUT
V
MEAS
V
MEAS
Table 55. Driver Types
Driver Type Associated Pins
A
LACK1–0, LDAT0[7:0], LDAT1[7:0], MLBCLK, MLBDAT,
MLBDO, MLBSIG, MLBSO, AMI_ACK,
AMI_ADDR23–0, AMI_DATA7–0, AMI_MS1–0,
AMI_RD, AMI_WR, DAI_P, DPI_P, EMU, FLAG3–0,
RESETOUT, TDO
BLCLK1–0
C
DDR2_ADDR15–0, DDR2_BA2–0, DDR2_CAS,
DDR2_CKE, DDR2_CS3–0, DDR2_DATA15–0,
DDR2_DM1–0, DDR2_ODT, DDR2_RAS, DDR2_WE
D (TRUE)
DDR2_CLK1–0, DDR2_DQS1–0
D (COMP)
DDR2_CLK1–0, DDR2_DQS1–0
Figure 46. Output Buffer Characteristics (Worst-Case Non-DDR2)
SWEEP (V
DDEXT) VOLTAGE (V)
0
3.5
0.5
1.0
1.5
2.0
2.5
3.0
0
100
200
SOURCE/SINK
(V
DDEXT
)CURRENT
(mA)
150
50
-100
-200
-150
-50
V
OH 3.13 V, 125 °C
V
OL 3.13 V, 125 °C
TYPE A
TYPE B
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