(20% to 80%, VDD_E" />
參數(shù)資料
型號(hào): ADSP-21469KBCZ-3
廠商: Analog Devices Inc
文件頁(yè)數(shù): 57/72頁(yè)
文件大小: 0K
描述: IC DSP 32/40BIT 400MHZ 324BGA
產(chǎn)品變化通告: Pin Function Change 08/Mar/2012
標(biāo)準(zhǔn)包裝: 1
系列: SHARC®
類型: 浮點(diǎn)
接口: DAI,DPI,EBI/EMI,I²C,SCI,SPI,SSP,UART/USART
時(shí)鐘速率: 400MHz
非易失內(nèi)存: 外部
芯片上RAM: 5Mb
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.05V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 324-BGA,CSPBGA
供應(yīng)商設(shè)備封裝: 324-CSPBGA
包裝: 托盤
Rev. 0
|
Page 60 of 72
|
June 2010
ADSP-21469
Figure 51. Typical Output Rise/Fall Time DDR2
(20% to 80%, VDD_EXT = Min)
Figure 52. Typical Output Rise/Fall Delay Non-DDR
(VDD_EXT = Min)
LOAD CAPACITANCE (pF)
0
RISE
AND
FALL
TIMES
(ns)
25
40
20
535
10
15
30
3
0
3.5
2
1
0.5
1.5
2.5
4
y = 0.0841x + 0.8997
TYPE C & D HALF DRIVE FALL
y = 0.0617x + 0.7995
TYPE C & D HALF DRIVE RISE
y = 0.0421x + 0.9257
TYPE C & D FULL
DRIVE FALL
TYPE C & D FULL
DRIVE RISE
y = 0.0304x + 0.8204
LOAD CAPACITANCE (pF)
6
0
7
4
2
1
3
RISE
AND
FALL
TIMES
DELAY
(ns)
125
200
100
25
175
50
75
150
5
y = 0.0256x + 3.5876
y = 0.0116x + 3.5697
8
y = 0.0359x + 2.9227
9
10
y = 0.0136x + 3.1135
TYPE A DRIVE FALL
TYPE A DRIVE RISE
TYPE B DRIVE FALL
TYPE B DRIVE RISE
Figure 53. Typical Output Rise/Fall Delay No- DDR
(VDD_EXT = Max)
Figure 54. Typical Output Rise/Fall Delay DDR Pad C
(VDD_EXT = Min)
LOAD CAPACITANCE (pF)
3
0
3.5
2
1
0.5
1.5
RISE
AND
FALL
DELAY
(ns)
2.5
y = 0.0152x + 1.7611
y = 0.0060x + 1.7614
y = 0.0196x + 1.2934
y = 0.0074x + 1.421
0
25
200
150
50
75
100
125
175
TYPE A FALL
TYPE A RISE
TYPE B RISE
TYPE B FALL
4
4.5
LOAD CAPACITANCE (pF)
0
RISE
AND
FALL
DELAY
(ns)
25
20
535
10
15
30
TYPE C HALF DRIVE (FALL)
y = 0.0122x + 2.0405
TYPE C HALF DRIVE (RISE)
y = 0.0079x + 2.0476
TYPE C FULL DRIVE (RISE & FALL)
y = 0.0023x + 1.9472
2.4
2.6
1.8
1.6
1.4
2.8
2.2
2.0
3.0
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