參數(shù)資料
型號: AM188ER-25KCW
廠商: ADVANCED MICRO DEVICES INC
元件分類: 微控制器/微處理器
英文描述: CA-BAYONET
中文描述: 16-BIT, 25 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 90/112頁
文件大?。?/td> 2878K
代理商: AM188ER-25KCW
90
Am186
TM
ER and Am188
TM
ER Microcontrollers Data Sheet
DRAFT
All timing parameters are measured at V
CC
/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with C
L
=50 pF For switching tests, V
IL
=0.3 V and V
IH
=V
CC
–0.3 V.
a
Testing is performed with equal loading on referenced pins.
b
This parameter applies to the DEN signal.
Switching Characteristics over Commercial and Industrial Operating Ranges
Software Halt Cycle (25 MHz and 33 MHz)
Notes:
All timing parameters are measured at V
CC
/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with C
L
=50 pF For switching tests, V
IL
=0.3 V and V
IH
=V
CC
–0.3 V.
a
Testing is performed with equal loading on referenced pins.
b
This parameter applies to the DEN signal.
Switching Characteristics over Commercial and Industrial Operating Ranges
Software Halt Cycle (40 MHz and 50 MHz)
Preliminary
Parameter
Description
25 MHz
Min
33 MHz
Min
No.
General Timing Responses
3
t
CHSV
4
t
CLSH
5
t
CLAV
9
t
CHLH
t
11
t
CHLL
19
t
DXDL
22
t
CHCTV
68
t
CHAV
Symbol
Max
Max
Unit
Status Active Delay
Status Inactive Delay
AD Address Invalid Delay
ALE Active Delay
ALE Inactive Delay
DEN Inactive to DT/R Low
(a)
Control Active Delay 2
(b)
CLKOUTA High to A Address Invalid
0
0
0
20
20
20
20
0
0
0
15
15
15
15
ns
ns
ns
ns
ns
ns
ns
ns
t
–10=30
t
–10=20
20
15
0
0
0
0
0
0
20
20
15
15
Preliminary
Parameter
Description
40 MHz
Min
50 MHz
Min
No.
General Timing Responses
3
t
CHSV
4
t
CLSH
5
t
CLAV
9
t
CHLH
10
t
LHLL
11
t
CHLL
19
t
DXDL
22
t
CHCTV
68
t
CHAV
Symbol
Max
Max
Unit
Status Active Delay
Status Inactive Delay
AD Address Invalid Delay
ALE Active Delay
ALE Width
ALE Inactive Delay
DEN Inactive to DT/R Low
(a)
Control Active Delay 2
(b)
CLKOUTA High to A Address Invalid
0
0
0
12
12
12
12
0
0
0
10
10
10
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
CLCL
–5=20
15
12
10
0
0
0
0
0
0
12
10
10
10
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