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參數(shù)資料
| 型號： | AM79C970A |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| 中文描述： | PCnet - 2的PCI單芯片全雙工以太網(wǎng)控制器，適用于PCI總線產(chǎn)品 |
| 文件頁數(shù)： | 209/219頁 |
| 文件大小： | 1065K |
| 代理商： | AM79C970A |
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AMD
D-5
Am79C970A
application call latency, minus the time needed for the
driver to write to the third descriptor, minus the time
needed for the driver to copy data from buffer #1 to the
application buffer space, and minus the time needed for
the driver to copy data from buffer #2 to the application
buffer space. Note that the time needed for the copies
performed by the driver depends upon the sizes of the
2nd and 3rd buffers, and that the sizes of the second and
third buffers need to be set according to the time needed
for the data copy operations! This means that an
iterative self-adjusting mechanism needs to be placed
into the software to determine the correct buffer sizing
for optimal operation. Fixed values for buffer sizes may
be used; in such a case, the LAPP method will still pro-
vide a significant performance increase, but the per-
formance increase will not be maximized.
The following diagram illustrates this setup for a receive
ring size of 9:
19436A-58
A = Expected message size in bytes
S1 = Interrupt latency
S2 = Application call latency
S3 = Time needed for driver to write
to third descriptor
S4 = Time needed for driver to copy
data from buffer #1 to
application buffer space
S6 = Time needed for driver to copy
data from buffer #2 to
application buffer space
Note that the times needed for tasks S1,
S2, S3, S4, and S6 should be divided by
0.8 microseconds to yield an equivalent
number of network byte times before
subtracting these quantities from the
expected message size A.
OWN = 1 STP = 1
SIZE = A-(S1+S2+S3+S4+S6)
Descriptor
#1
OWN = 1 STP = 0
SIZE = S1+S2+S3+S4
Descriptor
#2
OWN = 0 STP = 0
SIZE = S6
Descriptor
#3
OWN = 1 STP = 1
SIZE = A-(S1+S2+S3+S4+S6)
Descriptor
#4
OWN = 1
SIZE = S1+S2+S3+S4
Descriptor
#5
STP = 0
Descriptor
#6
OWN = 0 STP = 0
SIZE = S6
OWN = 1 STP = 1
SIZE = A-(S1+S2+S3+S4+S6)
Descriptor
#7
OWN = 1
SIZE = S1+S2+S3+S4
Descriptor
#8
STP = 0
Descriptor
#9
OWN = 0 STP = 0
SIZE = S6
Figure D2
.
LAPP 3 Buffer Grouping
LAPP Rules for Parsing of Descriptors
When using the LAPP method, software must use a
modified form of descriptor parsingas follows:
Software will examine OWN and STP to determine
where a RCV frame begins. RCV frames will only
begin in buffers that have OWN = 0 and STP = 1.
Software shall assume that a frame continues until
it finds either ENP = 1 or ERR= 1.
Software must discard all descriptors with
OWN = 0 and STP = 0 and move to the next
descriptor when searching for the beginning of a
new frame; ENP and ERR should be ignored by
software during this search.
Software cannot change an STP value in the re-
ceive descriptor ring after the initial setup of the
ring is complete, even if software has ownership of
the STP descriptor unless the previous STP de-
scriptor in the ring is also OWNED by the software.
When LAPPEN = 1, then hardware will use a modified
form of descriptor parsingas follows:
The controller will examine OWN and STP to de-
termine where to begin placing a RCV frame. A
new RCV frame will only begin in a buffer that has
OWN= 1 and STP = 1.
The controller will always obey the OWN bit for
determining whether or not it may use the next
buffer for a chain.
The controller will always mark the end of a frame
with either ENP = 1 or ERR= 1.
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PDF描述 |
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| AM79C971VCW | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C970AKC | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
| AM79C970AKC\\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Advanced Micro Devices 功能描述: |
| AM79C970AKC\W | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AM79C970AKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet-PCI II Single-Chip Full-Duplex Ethernet Controller for PCI Local Bus Product |
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