參數(shù)資料
型號(hào)： CP2200-GQ
廠商： Silicon Laboratories Inc
文件頁數(shù)： 25/108頁
文件大?。?/td> 0K
描述： IC ETH CTRLR SNGL-CHIP 48TQFP
標(biāo)準(zhǔn)包裝： 250
控制器類型： 以太網(wǎng)控制器，MAC/10Base-T
接口： 并行/串行
電源電壓： 3.1 V ~ 3.6 V
電流 - 電源： 75mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 托盤
產(chǎn)品目錄頁面： 627 (CN2011-ZH PDF)
配用： 336-1316-ND - KIT EVAL FOR CP2201 ETH CTRLR
其它名稱： 336-1312
CP2200/1
Rev. 1.0
23
7. Internal Memory and Registers
The CP2200/1 is controlled through direct and indirect registers accessible through the parallel host interface. The
host interface provides an 8-bit address space, of which there are 114 valid direct register locations (see Table 11
on page 25). All remaining addresses in the memory space are reserved and should not be read or written. The
direct registers provide access to the RAM buffers, Flash memory, indirect MAC configuration registers, and other
status and control registers for various device functions.
Figure 13 shows the RAM and Flash memory organization. The transmit and receive RAM buffers share the same
address space and are both accessed using the RAMADDRH:RAMADDRL pointer. Each of the buffers has a
dedicated data register. The Flash memory has a separate address space and a dedicated address pointer and
data register. See “13. Flash Memory” on page 73 for detailed information on how to read and write to Flash.
Figure 13. RAM Buffers and Flash Memory Organization
7.1. Random Access to RAM Transmit and Receive Buffers
The most common and most efficient methods for accessing the transmit and receive buffers are the AutoWrite
and AutoRead interfaces. These interfaces allow entire packets to be written or read at a time. In very few cases,
the transmit and receive buffers may need to be accessed randomly. An example of this is a system in which a
specific byte in the packet is checked to determine whether to read the packet or discard it. The following
procedure can be used to read or write data to either RAM buffer:
Step 1: Write the address of the target byte to RAMADDRH:RAMADDRL.
Step 2: Transmit Buffer:
Read or write 8-bit data to RAMTXDATA to read or write from the target byte in the transmit buffer.
Receive Buffer:
Read or write 8-bit data to RAMRXDATA to read or write from the target byte in the receive buffer.
Note: Reads and writes of the RAM buffers using the random access method are independent of the
AutoRead and AutoWrite interfaces. Each of the interfaces has a dedicated set of address and data
Autoread Interface” on page 58 for additional information about the AutoRead and AutoWrite
interfaces.
Flash Memory (8K)
0x0000 – 0x1FFF
Transmit Buffer (2K)
0x0000 – 0x07FF
Receive Buffer (4K)
0x0000 – 0x0FFF
RAMADDRH:RAMADDRL
FLASHADDRH:FLASHADDRL
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CP2201 制造商:SILABS 制造商全稱:SILABS 功能描述:SINGLE-CHIP ETHERNET CONTROLLER
CP2201EK 功能描述:以太網(wǎng)開發(fā)工具 ETHERNET EVAL KIT RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
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