參數(shù)資料
型號: CP2200-GQ
廠商: Silicon Laboratories Inc
文件頁數(shù): 28/108頁
文件大?。?/td> 0K
描述: IC ETH CTRLR SNGL-CHIP 48TQFP
標(biāo)準(zhǔn)包裝: 250
控制器類型: 以太網(wǎng)控制器,MAC/10Base-T
接口: 并行/串行
電源電壓: 3.1 V ~ 3.6 V
電流 - 電源: 75mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
產(chǎn)品目錄頁面: 627 (CN2011-ZH PDF)
配用: 336-1316-ND - KIT EVAL FOR CP2201 ETH CTRLR
其它名稱: 336-1312
CP2200/1
26
Rev. 1.0
INT0
0x63
Interrupt Status Register 0 (Self-Clearing)
INT0EN
0x64
Interrupt Enable Register 0
INT0RD
0x76
Interrupt Status Register 0 (Read-Only)
INT1
0x7F
Interrupt Status Register 1 (Self-Clearing)
INT1EN
0x7D
Interrupt Enable Register 1
INT1RD
0x7E
Interrupt Status Register 1 (Read-Only)
IOPWR
0x70
Port Input/Output Power
MACADDR
0x0A
MAC Address Pointer
MACDATAH
0x0B
MAC Data Register High Byte
MACDATAL
0x0C
MAC Data Register Low Byte
MACRW
0x0D
MAC Read/Write Initiate
OSCPWR
0x7C
Oscillator Power
PHYCF
0x79
Physical Layer Configuration
PHYCN
0x78
Physical Layer Control
PHYSTA
0x80
Physical Layer Status
RAMADDRH
0x08
RAM Address Pointer High Byte
RAMADDRL
0x09
RAM Address Pointer Low Byte
RAMRXDATA
0x02
RXFIFO RAM Data Register
RAMTXDATA
0x04
TXBUFF RAM Data Register
RSTEN
0x72
Reset Enable Register
RSTSTA
0x73
Reset Source Status Register
RXAUTORD
0x01
RXFIFO AutoRead w/ increment
RXCN
0x11
Receive Control
RXFIFOHEADH
0x17
Receive Buffer Head Pointer High Byte
RXFIFOHEADL
0x18
Receive Buffer Head Pointer Low Byte
RXFIFOSTA
0x5B
Receive Buffer Status
RXFIFOTAILH
0x15
Receive Buffer Tail Pointer High Byte
RXFIFOTAILL
0x16
Receive Buffer Tail Pointer Low Byte
RXFILT
0x10
Receive Filter Configuration
Table 11. Direct Registers
Register
Address
Description
Page No.
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