參數(shù)資料
型號(hào): CP2200-GQ
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 84/108頁(yè)
文件大?。?/td> 0K
描述: IC ETH CTRLR SNGL-CHIP 48TQFP
標(biāo)準(zhǔn)包裝: 250
控制器類型: 以太網(wǎng)控制器,MAC/10Base-T
接口: 并行/串行
電源電壓: 3.1 V ~ 3.6 V
電流 - 電源: 75mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 627 (CN2011-ZH PDF)
配用: 336-1316-ND - KIT EVAL FOR CP2201 ETH CTRLR
其它名稱: 336-1312
CP2200/1
Rev. 1.0
77
Register 63. FLASHDATA: FLASH Read/Write Data Register
Register 64. FLASHAUTORD: FLASH AutoRead Data Register
Register 65. FLASHERASE: FLASH Erase Register
Bits7–0: FLASHDATA: Flash Read/Write Data Register
Read:
Value of the Flash byte at the location specified by FLASHADDRH:FLASHADDRL.
Write:
Initiates a Flash write operation to the Flash byte at the address in FLASHADDRH:FLASHADDRL.
The Flash memory must be unlocked, and the target Flash byte should have a value of 0xFF (value
of erased Flash).
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Address:
0x06
Bits7–0: FLASHAUTORD: Flash AutoRead Data Register
Reads from this register return the value of the Flash byte at the location specified by the Flash
Address Register. The Flash Address Register is automatically incremented by 1 after the read.
R
RR
RRR
RR
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
B
Bit2
Bit1
Bit0
Address:
0x05
Bits 7–2: UNUSED. Read = 000000b, Write = don’t care.
Bit 1:
Reserved. Must write 0b.
Bit 0:
FLEGO: Flash Erase Start.
Writing a ‘1’ to this bit initiates a Flash erase operation on the 512-byte page of Flash containing the
Flash byte at the location specified in the Flash Address Register. The Flash memory must be
unlocked prior to starting a Flash erase operation.
R/W
Reset Value
———
——
Reserved
FLEGO
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Address:
0x6A
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