參數(shù)資料
型號(hào)： CP2200-GQ
廠商： Silicon Laboratories Inc
文件頁數(shù)： 82/108頁
文件大?。?/td> 0K
描述： IC ETH CTRLR SNGL-CHIP 48TQFP
標(biāo)準(zhǔn)包裝： 250
控制器類型： 以太網(wǎng)控制器，MAC/10Base-T
接口： 并行/串行
電源電壓： 3.1 V ~ 3.6 V
電流 - 電源： 75mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-TQFP
供應(yīng)商設(shè)備封裝： 48-TQFP（7x7）
包裝： 托盤
產(chǎn)品目錄頁面： 627 (CN2011-ZH PDF)
配用： 336-1316-ND - KIT EVAL FOR CP2201 ETH CTRLR
其它名稱： 336-1312
CP2200/1
Rev. 1.0
75
13.3. Flash Access Registers
The CP2200 Flash is accessed through the registers in Table 17. See the register tables following Table 17 for
detailed register descriptions
Register 59. FLASHSTA: Flash Status Register
Table 19. Flash Access Register Summary
Register
Long Name
Address
Description
FLASHSTA
Flash Status
0x7B
Used to determine the status of a Flash write
or erase operation.
FLASHKEY
Flash Lock and Key
0x67
Write-only register allowing the host to
unlock the Flash for writing or erasing.
FLASHADDRH
FLASHADDRL
Flash Address Register High and
Low Bytes
0x69
0x68
16-bit Address used for Flash operations.
FLASHDATA
Flash Read/Write Data Register
0x06
Data register used for writing or reading a
single byte of Flash.
FLASHAUTORD
Flash AutoRead Data Register
0x05
Data register used for reading a block of
sequential data stored in Flash. Each read
from this register increments the Flash
address register by 1.
FLASHERASE
Flash Erase
0x6A
Initiates a Flash erase operation.
Note: To determine when a Flash operation completes, the FLBUSY bit should be polled or software should
wait for the Flash Write/Erase Operation Complete Interrupt to occur.
Bits 7–4: UNUSED. Read = 0000b, Write = don’t care.
Bit 3:
FLBUSY: FLASH Busy Indicator
This bit indicates when a FLASH write or erase operation is in progress.
0: FLASH is idle.
1: FLASH write/erase operation is currently in progress.
Bit 2:
Reserved.
Bit 1:
FLWRITE: FLASH Write
0: The last Flash operation completed was not a Flash write.
1: The last Flash operation completed was a Flash write.
Bit 0:
FLERASE: FLASH Erase
0: The last Flash operation completed was not a Flash erase.
1: The last Flash operation completed was a Flash erase.
R/W
R
Reset Value
—
FLBUSY Reserved FLWRITE FLERASE 00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Address:
0x7B
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