參數(shù)資料
型號(hào): DM9801A
文件頁(yè)數(shù): 19/60頁(yè)
文件大?。?/td> 605K
代理商: DM9801A
DM9801A
1M Home Phoneline Network Physical Layer Single Chip Transceiver
Final
Version: DM9801A-DS-F01
May 30, 2001
19
General Purpose Serial Interface
(continued)
STDCLK
SRDCLK
STXEN
STXDAT
CRS
SRXDAT
CLSN
Once STXEN is cleared, the last symbol gets encoded and transmitted. The looped-back data is presented back to the MAC
and sometime later CRS falls. Once CRS falls, STDCLK and SRDCLK toggle for 97 clocks after which the system returns to
the Idle state.
TXPKT - STXEN Cleared
Figure 16
STDCLK
SRDCLK
STXEN
STXDAT
CRS
SRXDAT
CLSN
CLSN will be asserted some time after the preamble and SFD have been clocked in. STDCLK and SRDCLK are then clocked
until CRS drops. STXEN drops sometime after CLSN was asserted. CRS and CLSN are dropped together after more than
500 clocks. STDCLK and SRDCLK keep toggling for approximately another 100 clock cycles, then the system returns to the
idle state.
TXPKT - CLSN Asserted
Figure 17
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