參數(shù)資料
型號(hào): DS21FT42
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 32/145頁
文件大?。?/td> 466K
代理商: DS21FT42
DALLAS SEMICONDUCTOR
DS21FF42/DS21FT42
101899
/1232
85
86
87
88
89
8A
8B
8C
8D
8E
8F
90
91
92
93
94
95
96
97
98
99
9A
9B
9C
9D
9E
9F
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Receive Channel 6
Receive Channel 7
Receive Channel 8
Receive Channel 9
Receive Channel 10
Receive Channel 11
Receive Channel 12
Receive Channel 13
Receive Channel 14
Receive Channel 15
Receive Channel 16
Receive HDLC DS0 Control Register 1
Receive HDLC DS0 Control Register 2
Transmit HDLC DS0 Control Register 1
Transmit HDLC DS0 Control Register 2
Interleave Bus Operation Register
Not used
Test 2
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
RC6
RC7
RC8
RC9
RC10
RC11
RC12
RC13
RC14
RC15
RC16
RDC1
RDC2
TDC1
TDC2
IBO
(set to 00H)
TEST2 (set to 00h)
(set to 00H)
(set to 00H)
(set to 00H)
(set to 00H)
(set to 00H)
(set to 00H)
(set to 00H)
(set to 00H)
(set to 00H)
NOTES:
1. Test Registers 1 and 2 are used only by the factory; these registers must be cleared (set to all zeros) on
power– up initialization to insure proper operation.
2. Register banks AxH, BxH, CxH, DxH, ExH, and FxH are not accessible.
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