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參數(shù)資料
| 型號： | DS21FT42 |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 33/145頁 |
| 文件大?。?/td> | 466K |
| 代理商： | DS21FT42 |
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DALLAS SEMICONDUCTOR
DS21FF42/DS21FT42
101899
/1233
9. PARALLEL PORT
The DS21Q42 is controlled via either a nonmultiplexed (MUX = 0) or a multiplexed (MUX
= 1) bus by an external microcontroller or microprocessor. The DS21Q42 can operate with
either Intel or Motorola bus timing configurations. If the BTS pin is tied low, Intel timing
will be selected; if tied high, Motorola timing will be selected. All Motorola bus signals are
listed in parenthesis (). See the timing diagrams in the A.C. Electrical Characteristics in
Section 25 for more details.
10. CONTROL, ID AND TEST REGISTERS
The operation of each framer within the DS21Q42 is configured via a set of eleven control
registers. Typically, the control registers are only accessed when the system is first powered
up. Once a channel in the DS21Q42 has been initialized, the control registers will only need
to be accessed when there is a change in the system configuration. There are two Receive
Control Register (RCR1 and RCR2), two Transmit Control Registers (TCR1 and TCR2),
and seven Common Control Registers (CCR1 to CCR7). Each of the eleven registers are
described in this section. There is a device Identification Register (IDR) at address 0Fh. The
MSB of this read–only register is fixed to a zero indicating that the DS21Q42 is present.
The E1 pin–for–pin compatible version of the DS21Q42 is the DS21Q44 and it also has an
ID register at address 0Fh and the user can read the MSB to determine which chip is present
since in the DS21Q42 the MSB will be set to a zero and in the DS21Q44 it will be set to a
one. The lower four bits of the IDR are used to display the die revision of the chip.
Power–Up Sequence
The DS21Q42 does not automatically clear its register space on power–up. After the
supplies are stable, each of the four framer’s register space should be configured for operation
by writing to all of the internal registers. This includes setting the Test and all unused
registers to 00Hex.
This can be accomplished using a two-pass approach on each framer within the DS21Q42.
1.
Clear framer’s register space by writing 00H to the addresses 00H through 09FH.
2.
Program required registers to achieve desired operating mode.
Note: When emulating the DS21Q41 feature set (FMS = 1), the full address space (00H
through 09FH) must be initialized. DS21Q41 emulation requires address pin A7 to be used.
FMS is tied to ground for the DS21FF42/DS21FT42.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21FT42N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl T1/T1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FT44 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FT44+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4X3 E1 Framer E1 Framer E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FT44N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FT44N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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