參數(shù)資料
型號: DS21FT42
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 84/145頁
文件大?。?/td> 466K
代理商: DS21FT42
DALLAS SEMICONDUCTOR
DS21FF42/DS21FT42
101899
/1234
SYMBOL
POSITION
NAME AND DESCRIPTION
HDLC7
HDLC6
HDLC5
HDLC4
HDLC3
HDLC2
HDLC1
HDLC0
THFR.7
THFR.6
THFR.5
THFR.4
THFR.3
THFR.2
THFR.1
THFR.0
HDLC Data Bit 7.
MSB of a HDLC packet data byte.
HDLC Data Bit 6.
HDLC Data Bit 5.
HDLC Data Bit 4.
HDLC Data Bit 3.
HDLC Data Bit 2.
HDLC Data Bit 1.
HDLC Data Bit 0.
LSB of a HDLC packet data byte.
RDC1: RECEIVE HDLC DS0 CONTROL REGISTER 1
(Address = 90 Hex)
(MSB)
RDS0E
(LSB)
RD0
-
RDS0M
RD4
RD3
RD2
RD1
SYMBOL
POSITION
NAME AND DESCRIPTION
RDS0E
RDC1.7
HDLC DS0 Enable.
0 = use receive HDLC controller for the FDL.
1 = use receive HDLC controller for one or more DS0 channels.
Not Assigned.
Should be set to 0.
DS0 Selection Mode.
0 = utilize the RD0 to RD4 bits to select which single DS0 channel to
use.
1 = utilize the RCHBLK control registers to select which DS0 channels
to use.
DS0 Channel Select Bit 4.
MSB of the DS0 channel select.
DS0 Channel Select Bit 3.
DS0 Channel Select Bit 2.
DS0 Channel Select Bit 1.
DS0 Channel Select Bit 0.
LSB of the DS0 channel select.
-
RDC1.6
RDC1.5
RDS0M
RD4
RD3
RD2
RD1
RD0
RDC1.4
RDC1.3
RDC1.2
RDC1.1
RDC1.0
RDC2: RECEIVE HDLC DS0 CONTROL REGISTER 2
(Address = 91 Hex)
(MSB)
RDB8
(LSB)
RDB1
RDB7
RDB6
RDB5
RDB4
RDB3
RDB2
SYMBOL
POSITION
NAME AND DESCRIPTION
RDB8
RDC2.7
DS0 Bit 8 Suppress Enable.
MSB of the DS0. Set to one to stop this bit
from being used.
DS0 Bit 7 Suppress Enable.
Set to one to stop this bit from being used.
DS0 Bit 6 Suppress Enable.
Set to one to stop this bit from being used.
RDB7
RDB6
RDC2.6
RDC2.5
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