23
SAM4CP [DATASHEET]
43051E–ATPL–08/14
b.
To enter wait mode using the WFE instruction:
Select the 4/8/12 MHz fast RC Oscillator as Main Clock.
Set the FLPM field in the PMC Fast Startup Mode Register (PMC_FSMR).
Set Flash Wait State at 0.
Set the LPM bit in the PMC Fast Startup Mode Register (PMC_FSMR).
Write a 0 to the SLEEPDEEP bit of the Cortex-M4 processor.
Execute the Wait-For-Event (WFE) instruction of the processor.
Notes: 1. Any frequency can be chosen. The 12 MHz frequency will provide a faster start-up compared to the 4 MHz,
but with the increased current consumption (in the
μ
A range). See electrical characteristics of the product.
2. Depending on the Flash Low-power Mode (FLPM) value, the flash enters three different modes:
If FLPM = 0, the flash enters Stand-by mode (Low consumption)
If FLPM = 1, the flash enters Deep Power-down mode (Extra low consumption)
If FLPM = 2, the flash enters Idle mode. Memory is ready for Read access
Whether the WAITMODE bit or the WFE instruction was used to enter wait mode, the system exits wait mode if one of
the following enabled wake-up events occurs:
WKUP[0-15] pins in Fast wake-up mode
Anti-tamper event detection
RTC alarm
RTT alarm
After exiting wait mode, the PIO controller has the same configuration state as before entering wait mode. The SAM4CP
is clocked back to the RC oscillator frequency which was used before entering wait mode. The core will start fetching
from flash at this frequency. Depending on configuration of the Flash Low-power Mode (FLPM) bits used to enter wait
mode, the application has to reconfigure it back to read idle mode.
5.5.3
Sleep Mode
The purpose of sleep mode is to optimize power consumption of the device versus response time. In this mode, only the
core clocks of CM4P0 and/or CM4P1 are stopped. Some of the peripheral clocks can be enabled depending on the
application needs. The current consumption in this mode is application dependent. This mode is entered via Wait for
Interrupt (WFI) or Wait for Event (WFE) instructions of the Cortex-M4.
The processor can be awakened from an interrupt if the WFI instruction of the Cortex-M4 is used to enter sleep mode, or
from an event if the WFE instruction is used. The WFI instruction can also be used to enter sleep mode with the
SLEEPONEXIT bit set to 1 in the System Control Register (SCB_SCR) of the Cortex-M. If the SLEEPONEXIT bit of the
SCB_SCR is set to 1, when the processor completes the execution of an exception handler it returns to thread mode and
enters immediately sleep mode. This mechanism can be used in applications that require the processor to run only when
an exception occurs. Setting the SLEEPONEXIT bit to 1 enables an interrupt-driven application in order to avoid
returning to an empty main application.