參數(shù)資料
型號(hào)： EVAL-ADV7173EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 35/60頁(yè)
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR ADV7173
標(biāo)準(zhǔn)包裝： 1
系列： Advantiv®
主要目的： 視頻，視頻處理
嵌入式： 否
已用 IC / 零件： ADV7173
主要屬性： NTSC/PAL 數(shù)字視頻編碼器
次要屬性： I²C 接口
已供物品： 板
REV. B
ADV7172/ADV7173
–40–
BRIGHTNESS CONTROL REGISTERS (BCR)
(Address (SR5–SR0) = 21H)
The brightness control register is an 8-bit-wide register which
allows brightness control. Figure 66 shows the operation under
control of this register.
BCR BIT DESCRIPTION
Reserved (BCR7–BCR5)
A Logic “0” must be written to these bits.
Brightness Value (BCR4–BCR0)
These five bits represent the value required to vary the “brightness
level” or pedestal added to the luma data. The available range is
from 0 IRE to 7.5 IRE in 18 steps. A value of 18 (10010) corre-
sponds to 7.5 IRE setup level added onto the pixel data. This
brightness control is possible in both PAL and NTSC.
SHARPNESS RESPONSE REGISTER (PR)
(Address (SR5-SR0) = 22H)
The sharpness response register is an 8-bit-wide register. The
four MSBs are set to “0.” The four LSBs are written to in order
to select a desired filter response. Figure 67 shows the operation
under control of this register.
PR BIT DESCRIPTION
Reserved (PR7–PR4)
A Logic “0” must be written to these bits.
Sharpness Response Value (PR3–PR0)
These four bits are used to select the desired luma filter response.
The option of twelve responses is given supporting a gain boost/
attenuation in the range –4 dB to +4 dB. The value 12 (1100)
written to these four bits corresponds to a boost of +4 dB while
the value 0 (0000) corresponds to –4 dB. For normal opera-
tion these four bits are set to 6 (0110). Refer to Figures 19–21
for filter plots.
BCR7
BCR6
BCR5
BCR4
BCR3
BCR2
BCR1
BCR0
BCR4–BCR0
BRIGHTNESS VALUE
BCR7–BCR5
ZERO SHOULD
BE WRITTEN
TO THESE BITS
Figure 66. Brightness Control Register
PR7
PR6
PR5
PR4
PR3
PR2
PR1
PR0
PR3–PR0
SHARPNESS RESPONSE
VALUE
PR7–PR4
ZERO SHOULD
BE WRITTEN
TO THESE BITS
Figure 67. Sharpness Response Register
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