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| 型號： | GC3011-CQ |
| 文件頁數(shù)： | 16/34頁 |
| 文件大小： | 194K |
| 代理商： | GC3011-CQ |
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GRAYCHIP,INC.
- 16 -
JULY 22, 1996
GC3011 DIGITAL RESAMPLER
This document contains information which may be changed at any time without notice
C[0:7]
CONTROL DATA I/O BUS
. Active high
This is the 8 bit control data I/O bus. Control register data is loaded
into the chip or read from the chip through these pins. The chip will
only drive these pins when
CS
is low and
R/W
is high.
A[0:3]
CONTROL ADDRESS BUS
. Active high
These pins are used to address the 16 control registers within the
chip. Each of the 16 control registers within the chip are assigned
a unique address. A control register can be written to or read from
by setting
A[0:3]
to the register’s address.
R/W
READ/WRITE CONTROL
. High for read, low for write
This pin determines if the control bus cycle is a read or write
operation. The pin is high for a read and is low for a write.
CS
CONTROL STROBE
. Active low
This control strobe enables the read or write operation. The
contents of the register selected by
A[0:3]
will be output on
C[0:7]
when
R/W
is high and
CS
is low.
If
R/W
is low when
CS
goes low,
then the selected register will be loaded with the contents of
C[0:7].
AVCC, AGND
ANALOG POWER AND GROUND,
power pins
The analog power and ground pins used by the output clock
generator. See Section 2.8.3.
CVIN, CVOUT
PLL CONTROL VOLTAGE PINS,
analog control voltage
The control voltage for the phase lock loop. Discrete components
connected to these pins as shown in Section 2.8.3 form the loop
filter for the PLL.
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