參數(shù)資料
型號(hào)： GC3011-CQ
文件頁(yè)數(shù)： 17/34頁(yè)
文件大?。?/td> 194K
代理商： GC3011-CQ
GRAYCHIP,INC.
- 17 -
JULY 22, 1996
GC3011 DIGITAL RESAMPLER
This document contains information which may be changed at any time without notice
4.0
CONTROL REGISTERS
The chip is configured and controlled through the use of 16 eight bit control registers. These
registers are accessed for reading or writing using the control bus pins (
CS
,
R/W
,
A[0:3]
, and
C[0:7]
)
described in the previous section. The register names and their addresses are:
ADDRESS
NAME
ADDRESS
NAME
0
RATIO byte 0
8
Sync Mode
1
RATIO byte 1
9
Counter Mode
2
RATIO byte 2
10
Output Mode
3
RATIO byte 3
11
Clock Mode 0
4
OFFSET byte 0
12
Clock Mode 1
5
OFFSET byte 1
13
Status Control
6
A Reg
14
Status 0
7
B Reg
15
Status 1
The following sections describe each of these registers. The type of each register bit is either R or
R/W indicating whether the bit is read only or read/write. All bits are active high.
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