參數(shù)資料
型號(hào): KM48S8030B
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 2M x 8Bit x 4 Banks Synchronous DRAM(2M x 8位 x 4組同步動(dòng)態(tài)RAM)
中文描述: 200萬× 8位× 4銀行同步DRAM(2米× 8位× 4組同步動(dòng)態(tài)RAM)的
文件頁(yè)數(shù): 29/43頁(yè)
文件大?。?/td> 625K
代理商: KM48S8030B
TIMING DIAGRAM - III
CMOS SDRAM
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
ELECTRONICS
REV. 2 Mar. '98
Power Up Sequence
: Don't care
CLOCK
CKE
CS
RAS
CAS
ADDR
BA
0
A
10
/AP
DQ
WE
DQM
Precharge
(All Banks)
Auto Refresh
Auto Refresh
Mode Register Set
Row Active
(A-Bank)
BA
1
RAa
RAa
tRP
tRC
High level is necessary
High-Z
High level is necessary
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
ó
tRC
Key
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