參數(shù)資料
型號: M58MR016C
廠商: 意法半導體
英文描述: 16 Mbit 1Mb x16, Mux I/O, Dual Bank, Burst 1.8V Supply Flash Memory
中文描述: 16兆1兆x16插槽,復用的I / O,雙行,突發(fā)1.8V電源快閃記憶體
文件頁數(shù): 27/51頁
文件大?。?/td> 389K
代理商: M58MR016C
27/51
M58MR016C, M58MR016D
Table 22. Burst Read Information
Table 23. Security Code Area
Offset
Data
Description
Value
(P)+13h = 48h
0003h
Page-mode read capability
bits 0-7
’n’ such that 2
n
HEX value represents the number of read-
page bytes. See offset 28h for device word width to
determine page-mode data output width. 00h indicates
no read page buffer.
8 Byte
(P+14)h = 49h
0003h
Number of synchronous mode read configuration fields that follow. 00h
indicates no burst capability.
3
(P+15)h = 4Ah
0001h
Synchronous mode read capability configuration 1
bit 3-7
bit 0-2
Reserved
’n’ such that 2
n+1
HEX value represents the maximum
number of continuous synchronous reads when the device is
configured for its maximum word width. A value of 07h
indicates that the device is capable of continuous linear bursts
that will output data until the internal burst counter reaches
the end of the device’s burstable address space. This field’s
3-bit value can be written directly to the read configuration
register bit 0-2 if the device is configured for its maximum
word width. See offset 28h for word width to determine the
burst data output width.
4
(P+16)h = 4Bh
0002h
Synchronous mode read capability configuration 2
8
(P+17)h = 4Ch
0007h
Synchronous mode read capability configuration 3
Cont.
(P+18)h = 4Dh
0028h
Max operating clock frequency (MHz)
40 MHz
(P+19)h = 4Eh
0001h
Supported handshaking signal (WAIT pin)
bit 0
bit 1
during synchronous read
during asynchronous read
(1 = Yes, 0 = No)
(1 = Yes, 0 = No)
Yes
No
Offset
80h
81h
82h
83h
84h
85h
86h
87h
88h
Data
Description
0000-0000-0000-0XX0
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
XXXX
Lock Protection Register
64 bits: unique device number
64 bits: User Programmable OTP
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