參數(shù)資料
型號(hào): MCIMX31_07
廠(chǎng)商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應(yīng)用處理器
文件頁(yè)數(shù): 19/108頁(yè)
文件大?。?/td> 1235K
代理商: MCIMX31_07
Electrical Characteristics
i.MX31/i.MX31L Advance Information, Rev. 2.3
Freescale Semiconductor
19
4.3.3
Clock Amplifier Module (CAMP) Electrical Characteristics
This section outlines the Clock Amplifier Module (CAMP) specific electrical characteristics.
Table 16
shows clock amplifier electrical characteristics.
4.3.4
1-Wire Electrical Specifications
Figure 5
depicts the RPP timing, and
Table 17
lists the RPP timing parameters.
Figure 5. Reset and Presence Pulses (RPP) Timing Diagram
Table 15. AC Electrical Characteristics of DDR I/O
ID
Parameter
Symbol
Test
Condition
Min
Typ
Max
Units
PA1
Output Transition Times (DDR Drive)
1
1
Use of DDR Drive can result in excessive overshoot and ringing.
tpr
25 pF
50 pF
0.51
0.97
0.82
1.58
1.28
2.46
ns
Output Transition Times (Max Drive)
tpr
25 pF
50 pF
0.67
1.29
1.08
2.1
1.69
3.27
ns
Output Transition Times (High Drive)
tpr
25 pF
50 pF
.99
1.93
1.61
3.13
2.51
4.89
ns
Output Transition Times (Std Drive)
tpr
25 pF
50 pF
1.96
3.82
3.19
6.24
4.99
9.73
ns
Table 16. Clock Amplifier Electrical Characteristics for CKIH Input
Parameter
Min
Typ
Max
Units
Input Frequency
15
75
MHz
VIL (for square wave input)
0
0.3
V
VIH (for square wave input)
(VDD
1
- 0.25)
1
VDD is the supply voltage of CAMP. See reference manual.
2
This value of the sinusoidal input will be measured through characterization.
3
V
Sinusoidal Input Amplitude
0.4
2
VDD
Vp-p
Duty Cycle
45
50
55
%
1-Wire bus
(BATT_LINE)
DS2502 Tx
“Presence Pulse”
OWIRE Tx
“Reset Pulse”
OW1
OW2
OW3
OW4
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