參數(shù)資料
型號: MCIMX31_07
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應用處理器
文件頁數(shù): 83/108頁
文件大?。?/td> 1235K
代理商: MCIMX31_07
Electrical Characteristics
i.MX31/i.MX31L Advance Information, Rev. 2.3
Freescale Semiconductor
83
Figure 70. SDHC Timing Diagram
.
4.3.20
SIM Electrical Specifications
Each SIM card interface consist of a total of 12 pins (for 2 separate ports of 6 pins each. Mostly one port
with 5 pins is used).
Table 52. SDHC Interface Timing Parameters
ID
Parameter
Symbol
Min
Max
Unit
Card Input Clock
SD1
Clock Frequency (Low Speed)
f
PP1
f
PP2
f
PP3
f
OD4
1
In low speed mode, card clock must be lower than 400 kHz, voltage ranges from 2.7 to 3.3 V.
2
In normal data transfer mode for SD/SDIO card, clock frequency can be any value between 0 – 25 MHz.
3
In normal data transfer mode for MMC card, clock frequency can be any value between 0 – 20 MHz.
4
In card identification mode, card clock must be 100 kHz ~ 400 kHz, voltage ranges from 2.7 to 3.3 V.
0
400
kHz
Clock Frequency (SD/SDIO Full Speed)
0
25
MHz
Clock Frequency (MMC Full Speed)
0
20
MHz
Clock Frequency (Identification Mode)
100
400
kHz
SD2
Clock Low Time
t
WL
10
ns
SD3
Clock High Time
t
WH
10
ns
SD4
Clock Rise Time
t
TLH
10
ns
SD5
Clock Fall Time
t
THL
10
ns
SDHC output / Card inputs CMD, DAT (Reference to CLK)
SD6
SDHC output delay
t
ODL
-6.5
3
ns
SDHC input / Card outputs CMD, DAT (Reference to CLK)
SD7
SDHC input setup
t
IS
18.5
ns
SD8
SDHC input hold
t
IH
-11.5
ns
SD1
SD5
SD7
SD4
SD8
CMD
DATA[3:0]
Output from SDHC to card
Input to SDHC
CLK
SD2
SD6
SD3
CMD
DATA[3:0]
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