參數(shù)資料
型號: MCIMX31_07
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: Multimedia Applications Processors
中文描述: 多媒體應(yīng)用處理器
文件頁數(shù): 65/108頁
文件大小: 1235K
代理商: MCIMX31_07
Electrical Characteristics
i.MX31/i.MX31L Advance Information, Rev. 2.3
Freescale Semiconductor
65
Figure 54. Parallel Interface Timing Diagram—Read Wait States
4.3.15.5.2
Parallel Interfaces
, Electrical Characteristics
Figure 55
,
Figure 57
,
Figure 56
, and
Figure 58
depict timing of asynchronous parallel interfaces based on
the system 80 and system 68k interfaces.
Table 46
lists the timing parameters at display access level. All
timing images are based on active low control signals (signals polarity is controlled via the
DI_DISP_SIG_POL Register).
WRITE OPERATION
READ OPERATION
DISPB_D#_CS
DISPB_RD
DISPB_WR
DISPB_PAR_RS
DISPB_D#_CS
DISPB_RD
DISPB_WR
DISPB_PAR_RS
DISPB_DATA
DISPB_D#_CS
DISPB_RD
DISPB_WR
DISPB_PAR_RS
DISPB_DATA
DISPB_DATA
DISP0_RD_WAIT_ST=00
DISP0_RD_WAIT_ST=01
DISP0_RD_WAIT_ST=10
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