參數資料
型號： MFRC53101T
廠商： NXP Semiconductors N.V.
元件分類： 通信及網絡
英文描述： ISO-IEC 14443 reader IC
封裝： MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 51, 2004,;MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<
文件頁數： 17/116頁
文件大小： 862K
代理商： MFRC53101T
MFRC531_34
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.4 — 26 January 2010
056634
17 of 116
NXP Semiconductors
MFRC531
ISO/IEC 14443 reader IC
Remark:
It is possible to load data for other key formats into the EEPROM key storage
location. However, it is not possible to validate card authentication with data which will
cause the LoadKeyE2 command (see
Section 11.6.1 on page 88
) to fail.
9.2.3.2
Storage of keys in the EEPROM
The MFRC531 reserves 384 bytes of memory in the EEPROM for the Crypto1 keys. No
memory segmentation is used to mirror the 12-byte structure of key storage. Thus, every
byte of the dedicated memory area can be the start of a key.
Example
: If the key loading cycle starts at the last byte address of an EEPROM block, (for
example, key byte 0 is stored at 12Fh), the next bytes are stored in the next EEPROM
block, for example, key byte 1 is stored at 130h, byte 2 at 131h up to byte 11 at 13Ah.
Based on the 384 bytes of memory and a single key needing 12 bytes, then up to 32
different keys can be stored in the EEPROM.
Remark:
It is not possible to load a key exceeding the EEPROM byte location 1FFh.
9.3 FIFO buffer
An 8
×
64 bit FIFO buffer is used in the MFRC531 to act as a parallel-to-parallel converter.
It buffers both the input and output data streams between the microprocessor and the
internal circuitry of the MFRC531. This makes it possible to manage data streams up to
64 bytes long without needing to take timing constraints into account.
9.3.1
Accessing the FIFO buffer
9.3.1.1
Access rules
The FIFO buffer input and output data bus is connected to the FIFOData register. Writing
to this register stores one byte in the FIFO buffer and increments the FIFO buffer write
pointer. Reading from this register shows the FIFO buffer contents stored at the FIFO
buffer read pointer and increments the FIFO buffer read pointer. The distance between the
write and read pointer can be obtained by reading the FIFOLength register.
When the microprocessor starts a command, the MFRC531 can still access the FIFO
buffer while the command is running. Only one FIFO buffer has been implemented which
is used for input and output. Therefore, the microprocessor must ensure that there are no
inadvertent FIFO buffer accesses.
Table 17
gives an overview of FIFO buffer access
during command processing.
Table 17.
Active
command
FIFO buffer access
FIFO buffer
μ
p Write
-
-
yes
-
yes
Remark
μ
p Read
-
-
-
yes
yes
StartUp
Idle
Transmit
Receive
Transceive
the microprocessor has to know the state of the
command (transmitting or receiving)
WriteE2
yes
-
相關PDF資料
PDF描述
MFRX85201HD Secure contactless reader solution
MMBD4148 High-speed switching diode
MMBD6050-V-GS08 SWITING 70V 0.2A 3PIN SOT-23 - Tape and Reel
MMBD6050-V-GS18 SWITING 70V 0.2A 3PIN SOT-23 - Tape and Reel
MMBD7000-V-GS08 Diode Small Signal Switching 100V 0.2A 3-Pin SOT-23 T/R
相關代理商/技術參數
參數描述
MFRC53101T/0FE,112 功能描述:RFID應答器 MIFARE HS READER RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel
MFRC53101T/0FE112 制造商:NXP Semiconductors 功能描述:CNTCLESS RC 5V ISO14443-A
MFRC53101T/0FE112 制造商:NXP Semiconductors 功能描述:IC RFID READER 13.56MHZ SOIC-32
MFRC630 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Contactless reader IC
MFRC63001HN,518 制造商:NXP Semiconductors 功能描述:MFRC63001HN/HVQFN32/REEL13DP// - Tape and Reel
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*