參數(shù)資料
型號: MFRC53101T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: ISO-IEC 14443 reader IC
封裝: MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 51, 2004,;MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<
文件頁數(shù): 55/116頁
文件大小: 862K
代理商: MFRC53101T
MFRC531_34
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.4 — 26 January 2010
056634
55 of 116
NXP Semiconductors
MFRC531
ISO/IEC 14443 reader IC
10.5.2.5
TimerValue register
Value of the timer.
Table 61.
Bit
Symbol
Access
Table 62.
Bit
7 to 0
10.5.2.6
CRCResultLSB register
LSB of the CRC coprocessor register.
Table 63.
Table 64.
Bit
7 to 0
10.5.2.7
CRCResultMSB register
MSB of the CRC coprocessor register.
Table 65.
Table 66.
Bit
7 to 0
TimerValue register (address: 0Ch) reset value: xxxx xxxxb, xxh bit allocation
7
6
5
4
TimerValue[7:0]
3
2
1
0
R
TimerValue register bit descriptions
Symbol
Description
TimerValue[7:0]
this register shows the timer counter value
CRCResultLSB register (address: 0Dh) reset value: xxxx xxxxb, xxh bit
allocation
7
6
5
Bit
Symbol
Access
4
3
2
1
0
CRCResultLSB[7:0]
R
CRCResultLSB register bit descriptions
Symbol
Description
CRCResultLSB[7:0]
gives the CRC register’s least significant byte value; only valid if
CRCReady = logic 1
CRCResultMSB register (address: 0Eh) reset value: xxxx xxxxb, xxh bit
allocation
7
6
5
4
CRCResultMSB[7:0]
Bit
Symbol
Access
3
2
1
0
R
CRCResultMSB register bit descriptions
Symbol
CRCResultMSB[7:0]
Description
gives the CRC register’s most significant byte value; only valid if
CRCReady = logic 1.
The register’s value is undefined for 8-bit CRC calculation.
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