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| 型號(hào)： | MFRC53101T |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | ISO-IEC 14443 reader IC |
| 封裝： | MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 51, 2004,;MFRC53101T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html< |
| 文件頁(yè)數(shù)： | 9/116頁(yè) |
| 文件大小： | 862K |
| 代理商： | MFRC53101T |
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MFRC531_34
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.4 — 26 January 2010
056634
9 of 116
NXP Semiconductors
MFRC531
ISO/IEC 14443 reader IC
9.1.3.2
Common read and write strobe
Refer to
Section 13.4.2 on page 94
for timing specification.
9.1.3.3
Common read and write strobe: EPP with handshake
Refer to
Section 13.4.3 on page 95
for timing specification.
Remark:
In the EPP standard, a chip select signal is not defined. To cover this situation,
the status of the NCS pin can be used to inhibit the nDStrb signal. If this inhibitor is not
used, it is mandatory that pin NCS is connected to pin DVSS.
Remark:
After each Power-On or Hard reset, the nWait signal on pin A0 is
high-impedance. nWait is defined as the first negative edge applied to the nAStrb pin after
the reset phase. The MFRC531 does not support the Read Address Cycle.
9.1.4
Serial Peripheral Interface
The MFRC531 provides compatibility with the 5-wire Serial Peripheral Interface (SPI)
standard and acts as a slave during SPI communication. The SPI clock signal SCK must
be generated by the master. Data communication from the master to the slave uses the
MOSI line. The MISO line sends data from the MFRC531 to the master.
Fig 4.
Connection to microprocessor: common read and write strobes
001aal221
address bus (A3 to An)
NCS
A0 to A2
address bus (A0 to A2)
D0 to D7
ALE
data bus (D0 to D7)
HIGH
NRD
Data strobe (NDS)
NWR
Read/Write (R/NW)
MFRC531
ADDRESS
DECODER
non-multiplexed address
NCS
AD0 to AD7
ALE
multiplexed address/data (AD0 to AD7)
Address strobe (AS)
NRD
Data strobe (NDS)
NWR
Read/Write (R/NW)
A2
LOW
A1
HIGH
A0
LOW
MFRC531
ADDRESS
DECODER
Fig 5.
Connection to microprocessor: EPP common read/write strobes and handshake
001aal222
LOW
NCS
AD0 to AD7
ALE
multiplexed address/data (AD1 to AD8)
Address strobe (nAStrb)
NRD
Data strobe (nDStrb)
NWR
Read/Write (nWrite)
A2
HIGH
A1
HIGH
A0
nWait
MFRC531
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