參數(shù)資料
型號： MT48LC4M16A2P-75:G
元件分類： DRAM
英文描述： 4M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝： 0.400 INCH, ROHS COMPLIANT, PLASTIC, TSOP2-54
文件頁數(shù)： 37/72頁
文件大?。?/td> 3455K
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
Micron Technology, Inc., reserves the right to change products or specifications without notice.
64MSDRAM_2.fm - Rev. N 12/08 EN
42
2000 Micron Technology, Inc. All rights reserved.
64Mb: x4, x8, x16 SDRAM
Commands
Notes:
1. This table applies when CKEn-1 was HIGH and CKEn is HIGH (see Table 8 on page 39) and
after tXSR has been met (if the previous state was self refresh).
2. This table describes alternate bank operation, except where noted; i.e., the current state is
for bank n and the commands shown are those allowed to be issued to bank m (assuming
that bank m is in such a state that the given command is allowable). Exceptions are covered
in the notes below.
3. Current state definitions:
4. AUTO REFRESH, SELF REFRESH, and LOAD MODE REGISTER commands may only be issued
when all banks are idle.
5. A BURST TERMINATE command cannot be issued to another bank; it applies to the bank
represented by the current state only.
Table 10:
Truth Table 4 – Current State Bank n, Command to Bank m
(Notes 1–6 apply to entire table; notes appear below and on next page)
Current State
CS#
RAS#
CAS#
WE#
Command (Action)
Notes
Any
H
XXX
COMMAND INHIBIT (NOP/continue previous operation)
L
HHH
NO OPERATION (NOP/continue previous operation)
Idle
XXXX
Any command otherwise allowed to bank m
Row
activating,
active, or
precharging
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start READ burst)
LH
L
WRITE (Select column and start WRITE burst)
LL
H
L
PRECHARGE
Read
(auto
precharge
disabled)
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start new READ burst)
LH
L
WRITE (Select column and start WRITE burst)
LL
H
L
PRECHARGE
Write
(auto
precharge
disabled)
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start READ burst)
LH
L
WRITE (Select column and start new WRITE burst)
LL
H
L
PRECHARGE
Read
(with auto
precharge)
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start new READ burst)
LH
L
WRITE (Select column and start WRITE burst)
LL
H
L
PRECHARGE
Write
(with auto
precharge)
LL
H
ACTIVE (Select and activate row)
LH
READ (Select column and start READ burst)
LH
L
WRITE (Select column and start new WRITE burst)
LL
H
L
PRECHARGE
Idle: The bank has been precharged, and tRP has been met.
Row active: A row in the bank has been activated, and tRCD has been met. No
data bursts/accesses and no register accesses are in progress.
Read: A READ burst has been initiated, with auto precharge disabled, and
has not yet terminated or been terminated.
Write: A WRITE burst has been initiated, with auto precharge disabled, and
has not yet terminated or been terminated.
Read w/auto
precharge enabled:
Starts with registration of a READ command with auto precharge
enabled, and ends when tRP has been met. After tRP is met, the
bank will be in the idle state.
Write w/auto
precharge enabled:
Starts with registration of a WRITE command with auto precharge
enabled, and ends when tRP has been met. After tRP is met, the
bank will be in the idle state.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT48LC4M16A2P75ITG 制造商:Micron Technology Inc 功能描述:
MT48LC4M16A2P-75ITG 制造商: 功能描述:
MT48LC4M16A2P-7E 制造商:Micron Technology Inc 功能描述:SDRAM 64MBIT 133MHZ 54TSOP 制造商:Micron Technology Inc 功能描述:SDRAM, 64MBIT, 133MHZ, 54TSOP 制造商:Micron Technology Inc 功能描述:SDRAM, 64MBIT, 133MHZ, 54TSOP, Memory Type:DRAM - Synchronous, Memory Configurat
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