參數(shù)資料
型號(hào)： MT48LC4M16A2P-75:G
元件分類： DRAM
英文描述： 4M X 16 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝： 0.400 INCH, ROHS COMPLIANT, PLASTIC, TSOP2-54
文件頁數(shù)： 48/72頁
文件大小： 3455K
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
Micron Technology, Inc., reserves the right to change products or specifications without notice.
64MSDRAM_2.fm - Rev. N 12/08 EN
52
2000 Micron Technology, Inc. All rights reserved.
64Mb: x4, x8, x16 SDRAM
Timing Diagrams
Figure 35:
Initialize and Load Mode Register
Notes:
1. If CS# is HIGH at clock HIGH time, all commands applied are NOP.
2. The mode register may be loaded prior to the AUTO REFRESH cycles if desired.
3. JEDEC and PC100 specify three clocks.
4. Outputs are guaranteed High-Z after command is issued.
tCH
tCL
tCK
CKE
CLK
COMMAND
DQ
BA0, BA1
BANK
tRFC
tMRD
tRFC
AUTO REFRESH
Program Mode Register 2, 3, 4
tCMH
tCMS
Precharge
all banks
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tRP
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tCKS
Power-up:
VDD and
CLK stable
T = 100s
MIN
PRECHARGE
NOP
AUTO
REFRESH
NOP
LOAD MODE
REGISTER
ACTIVE
NOP
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AUTO
REFRESH
ALL
BANKS
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High-Z
tCKH
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DQM /
DQML, DQMH
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NOP
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tCMH
tCMS
tCMH
tCMS
A0–A9, A11
ROW
tAH
tAS
CODE
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A10
ROW
tAH
tAS
CODE
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ALL BANKS
SINGLE BANK
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DON’T CARE
T0
T1
Tn + 1
To + 1
Tp + 1
Tp + 2
Tp + 3
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT48LC4M16A2P75ITG 制造商:Micron Technology Inc 功能描述:
MT48LC4M16A2P-75ITG 制造商: 功能描述:
MT48LC4M16A2P-7E 制造商:Micron Technology Inc 功能描述:SDRAM 64MBIT 133MHZ 54TSOP 制造商:Micron Technology Inc 功能描述:SDRAM, 64MBIT, 133MHZ, 54TSOP 制造商:Micron Technology Inc 功能描述:SDRAM, 64MBIT, 133MHZ, 54TSOP, Memory Type:DRAM - Synchronous, Memory Configurat
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