參數(shù)資料
型號： PCI6515ZHK
廠商： Texas Instruments, Inc.
英文描述： SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
中文描述： 單插槽CardBus控制器，專用智能卡插槽
文件頁數(shù)： 135/148頁
文件大小： 760K
代理商： PCI6515ZHK
711
7.17 Power Management Capabilities Register
The power management capabilities register indicates the capabilities of the Smart Card controller related to PCI
power management. See Table 712 for a complete description of the register contents.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Power management capabilities
Type
RU
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Default
0
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
Register:
Offset:
Type:
Default:
Power management capabilities
46h
Read/Update, Read-only
7E02h
Table 712. Power Management Capabilities Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
15
PME_D3COLD
RU
PME support from D3cold. This bit can be set to 1 or cleared to 0 via bit 4 (D3_COLD) in the general
control register at offset 4Ch in the PCI configuration space (see Section 7.21). When this bit is set to
1, it indicates that the controller is capable of generating a PME wake event from D3cold. This bit state
is dependent upon the PCI6515 VAUX implementation and may be configured by using bit 4
(D3_COLD) in the general control register (see Section 7.21).
1411
PME_SUPPORT
R
PME support. This 4-bit field indicates the power states from which the Smart Card interface may
assert PME. This field returns a value of 1111b by default, indicating that PME may be asserted from
the D3hot, D2, D1, and D0 power states.
D2 support. Bit 10 is hardwired to 1, indicating that the Smart Card controller supports the D2 power
state.
10
D2_SUPPORT
R
9
D1_SUPPORT
R
D1 support. Bit 9 is hardwired to 1, indicating that the Smart Card controller supports the D1 power
state.
86
AUX_CURRENT
R
Auxiliary current. This 3-bit field reports the 3.3-VAUX auxiliary current requirements. When bit 15
(PME_D3COLD) is cleared, this field returns 000b; otherwise, it returns 001b.
000b = Self-powered
001b = 55 mA (3.3-VAUX maximum current required)
Device-specific initialization. This bit returns 0 when read, indicating that the Smart Card controller
does not require special initialization beyond the standard PCI configuration header before a generic
class driver is able to use it.
5
DSI
R
4
RSVD
R
Reserved. Bit 4 returns 0 when read.
3
PME_CLK
R
PME clock. This bit returns 0 when read, indicating that the PCI clock is not required for the Smart Card
controller to generate PME.
20
PM_VERSION
R
Power-management version. This field returns 010b when read, indicating that the Smart Card
controller is compatible with the registers described in the
PCI Bus Power Management Interface
Specification
(Revision 1.1).
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