參數(shù)資料
型號： PCI6515ZHK
廠商： Texas Instruments, Inc.
英文描述： SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET
中文描述： 單插槽CardBus控制器，專用智能卡插槽
文件頁數(shù)： 45/148頁
文件大?。?/td> 760K
代理商： PCI6515ZHK
311
Figure 39 illustrates a byte read. The read protocol is very similar to the write protocol, except the R/W command
bit must be set to 1 to indicate a read-data transfer. In addition, the PCI6515 master must acknowledge reception
of the read bytes from the slave transmitter. The slave transmitter drives the SDA signal during read data transfers.
The SCL signal remains driven by the PCI6515 master.
S
b6
b4
b5
b3 b2 b1 b0
0
b7 b6 b5
b4 b3
b2
b1 b0
A
A
Slave Address
Word Address
R/W
S
b6
b4
b5
b3 b2 b1 b0
1
A
Slave Address
S/P = Start/Stop Condition
M = Master Acknowledgement
b7 b6
b4
b5
b3 b2 b1 b0
M
P
Data Byte
Start
Restart
R/W
A = Slave Acknowledgement
Stop
Figure 39. Serial-Bus Protocol—Byte Read
Figure 310 illustrates EEPROM interface doubleword data collection protocol.
S
1
1
0
0
0
0
0
0
b7 b6 b5 b4 b3
b2 b1 b0
A
A
Slave Address
Word Address
R/W
Data Byte 2
Data Byte 1
Data Byte 0
M
P
M
M
M = Master Acknowledgement
S/P = Start/Stop Condition
A = Slave Acknowledgement
Data Byte 3
M
S
1
1
0
0
0
0
0
1
A
Restart
R/W
Slave Address
Start
Figure 310. EEPROM Interface Doubleword Data Collection
3.6.4
Serial-Bus EEPROM Application
When the PCI bus is reset and the serial-bus interface is detected, the PCI6515 controller attempts to read the
subsystem identification and other register defaults from a serial EEPROM.
This format must be followed for the PCI6515 controller to load initializations from a serial EEPROM. All bit fields must
be considered when programming the EEPROM.
The serial EEPROM is addressed at slave address 1010 000b by the PCI6515 controller. All hardware address bits
for the EEPROM must be tied to the appropriate level to achieve this address. The serial EEPROM chip in the sample
application (Figure 310) assumes the 1010b high-address nibble. The lower three address bits are terminal inputs
to the chip, and the sample application shows these terminal inputs tied to GND.
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