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參數(shù)資料
| 型號： | PCI6515ZHK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SINGLE SOCKET CARDBUS CONTROLLER WITH DEDICATED SMART CARD SOCKET |
| 中文描述： | 單插槽CardBus控制器，專用智能卡插槽 |
| 文件頁數(shù)： | 30/148頁 |
| 文件大?。?/td> | 760K |
| 代理商： | PCI6515ZHK |
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214
Table 211. 16-Bit PC Card Interface Control Terminals
TERMINAL
I/O
DESCRIPTION
NAME
NUMBER
A_BVD1
(STSCHG/RI)
A12
I
Battery voltage detect 1. BVD1 is generated by 16-bit memory PC Cards that include batteries. BVD1 is
used with BVD2 as an indication of the condition of the batteries on a memory PC Card. Both BVD1 and
BVD2 are high when the battery is good. When BVD2 is low and BVD1 is high, the battery is weak and must
be replaced. When BVD1 is low, the battery is no longer serviceable and the data in the memory PC Card
is lost. See Section 5.6,
ExCA Card Status-Change Interrupt Configuration Register
, for enable bits. See
Section 5.5,
ExCA Card Status-Change Register
, and Section 5.2,
ExCA Interface Status Register
, for the
status bits for this signal.
Status change. STSCHG is used to alert the system to a change in the READY, write protect, or battery
voltage dead condition of a 16-bit I/O PC Card.
Ring indicate. RI is used by 16-bit modem cards to indicate a ring detection.
A_BVD2
(SPKR)
B12
I
Battery voltage detect 2. BVD2 is generated by 16-bit memory PC Cards that include batteries. BVD2 is
used with BVD1 as an indication of the condition of the batteries on a memory PC Card. Both BVD1 and
BVD2 are high when the battery is good. When BVD2 is low and BVD1 is high, the battery is weak and must
be replaced. When BVD1 is low, the battery is no longer serviceable and the data in the memory PC Card
is lost. See Section 5.6,
ExCA Card Status-Change Interrupt Configuration Register
, for enable bits. See
Section 5.5,
ExCA Card Status-Change Register
, and Section 5.2,
ExCA Interface Status Register
, for the
status bits for this signal.
Speaker. SPKR is an optional binary audio signal available only when the card and socket have been
configured for the 16-bit I/O interface. The audio signals from cards A and B are combined by the controller
and are output on SPKROUT.
DMA request. BVD2 can be used as the DMA request signal during DMA operations to a 16-bit PC Card
that supports DMA. The PC Card asserts BVD2 to indicate a request for a DMA operation.
A_CD1
A_CD2
N15
B11
I
Card detect 1 and card detect 2. CD1 and CD2 are internally connected to ground on the PC Card. When
a PC Card is inserted into a socket, CD1 and CD2 are pulled low. For signal status, see
Section 5.2,
ExCA
Interface Status Register
.
A_CE1
A_CE2
L17
K18
O
Card enable 1 and card enable 2. CE1 and CE2 enable even- and odd-numbered address bytes. CE1
enables even-numbered address bytes, and CE2 enables odd-numbered address bytes.
A_INPACK
C14
I
Input acknowledge. INPACK is asserted by the PC Card when it can respond to an I/O read cycle at the
current address.
DMA request. INPACK can be used as the DMA request signal during DMA operations from a 16-bit PC
Card that supports DMA. If it is used as a strobe, then the PC Card asserts this signal to indicate a request
for a DMA operation.
A_IORD
J18
O
I/O read. IORD is asserted by the controller to enable 16-bit I/O PC Card data output during host I/O read
cycles.
DMA write. IORD is used as the DMA write strobe during DMA operations from a 16-bit PC Card that
supports DMA. The controller asserts IORD during DMA transfers from the PC Card to host memory.
A_IOWR
J17
O
I/O write.
IOWR is driven low by the controller to strobe write data into 16-bit I/O PC Cards during host I/O
write cycles.
DMA read. IOWR is used as the DMA write strobe during DMA operations from a 16-bit PC Card that
supports DMA. The controller asserts IOWR during transfers from host memory to the PC Card.
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