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RELEASED
PM73122 AAL1GATOR-32
DATASHEET
PMC-1981419
ISSUE 7
32 LINK CES/DBCES AAL1 SAR PROCESSOR
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
270
Register 0x80126: UI Source Polling Priority List Register
(UI_SRC_POLL_LIST)
Bit
Type
Function
Default
15
R
unused
0
14:12
R/W
Priority 4 Init Value
100
B
011
B
010
B
001
B
000
B
11:9
R/W
Priority 3 Init Value
8:6
R/W
Priority 2 Init Value
5:3
R/W
Priority 1 Init Value
2:0
R/W
Priority 0 Init Value
This register is to be configured while the UI interface is held in reset.
The register is used to assign an initial priority to a particular A1SP or the
loopback FIFO for the source side polling mechanism. However, this is only the
initial priority for the first cell transfer and the subsequent priority is determined
by a Least Recently Serviced algorithm. The LRS algorithm rotates through the
assigned sources defined in this register, thus by changing the default IDs and
entering a particular source entry twice, for example, one source may be given a
greater opportunity for a source side cell transfer than another source (ie, 2/5 vs
1/5) as long as another third source is left out. This allows an A1SP configured
for high bandwidth operation to get more frequent servicing than lower bandwidth
A1SPs assuming an idle A1SP is left out.
Note that if a source does not have
a source ID configured in this register, it will never be serviced.
If all four
A1SP sources and the loop back FIFO are to be used, this register can be left at
it’s default value.
Each 3-bit Priority Init sub-field is configured with a value that corresponds to a
particular A1SP source or the Loop Back FIFO source according to the following
table:
Priority Init Value ID
Corresponding Source
000
A1SP0
001
A1SP1
010
A1SP2
011
A1SP3
100
Loop Back FIFO