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RELEASED
PM73122 AAL1GATOR-32
DATASHEET
PMC-1981419
ISSUE 7
32 LINK CES/DBCES AAL1 SAR PROCESSOR
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
387
In most cases, these values can be left at their default settings.
master, the Max_Threshold value should be changed to “A”.
SBI Framing Offsets Control:
In the Insert direction the offset between the C1FP pulse and the start
of an SBI frame is controlled by the C1FP_OFFSET for T1 Register
and C1FP_OFFSET for E1 Register. This register should be left in its
default state.
Enabling Tributaries/SPEs
An SPE must not be enabled without any tributaries enabled on it.
When initially activating an SPE, enable the tributaries first and then
enable the SPE. When deactivating an SPE, disable the SPE first and
then deactivate the tributaries.
14.2.4.5.1.1 Programming Sequence for SBI
To have a clean start up, the following programming sequences are
recommended when setting up the SBI interface:
General rules:
All INSBI/EXSBI read and write accesses must wait for al least 500 us after
chip SW_RESET is cleared, to allow time for the INSBI/EXSBI to complete
self-initialization. Other general control register outside of INSBI/EXSBI can
be configured at any time.
At initialization, SBI tributary receiver should be enabled before the
corresponding SBI tributary transmitter (ie, configuring EXSBI before INSBI)
Following a configuration change, which generates a Configuration Reset, a
tributary may not become active for up to 1 ms following the change.
Any write to a Tributary Control register for a tributary will generate a
configuration reset on that tributary, irrespective of whether the data written to
the tributary control register is unchanged from the previous value.
Mapping of more than one tributary to a link or more than one link to a
tributary is not allowed.