參數(shù)資料
型號(hào): S71PL191HB0BFI100
廠商: SPANSION LLC
元件分類: 存儲(chǔ)器
英文描述: SPECIALTY MEMORY CIRCUIT, PBGA73
封裝: 9 X 13 MM, LEAD FREE, FBGA-73
文件頁數(shù): 48/172頁
文件大?。?/td> 4662K
代理商: S71PL191HB0BFI100
May 7, 2004 S29JL064HA1
S29JL064H
45
Pre l i m i n a r y
AC Characteristics
Read-Only Operations
Notes:
1. Not 100% tested.
2. See 12 and Table 5 for test specifications
3. Measurements performed by placing a 50 ohm termination on the data pin with a bias of VCC/2. The time from OE#
high to the data bus driven to VCC/2 is taken as tDF
.
Parameter
Description
Test Setup
Speed Options
JEDEC
Std.
55
70
85
Unit
tAVAV
tRC
Read Cycle Time (Note 1)
Min
55
70
85
ns
tAVQV
tACC Address to Output Delay
CE#,
OE# = VIL
Max
55
70
85
ns
tELQV
tCE
Chip Enable to Output Delay
OE# = VIL
Max
55
70
85
ns
tGLQV
tOE
Output Enable to Output Delay
Max
25
30
40
ns
tEHQZ
tDF
Chip Enable to Output High Z (Notes 1, 3)
Max
16
ns
tGHQZ
tDF
Output Enable to Output High Z (Notes 1, 3)
Max
16
ns
tAXQX
tOH
Output Hold Time From Addresses, CE# or
OE#, Whichever Occurs First
Min
0
ns
tOEH
Output Enable Hold Time
Read
Min
0
ns
Toggle and
Data# Polling
Min
5
10
ns
tOH
tCE
Data
WE#
Addresses
CE#
OE#
HIGH Z
Valid Data
HIGH Z
Addresses Stable
tRC
tACC
tOEH
tRH
tOE
tRH
0 V
RY/BY#
RESET#
tDF
Figure 14. Read Operation Timings
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