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May 7, 2004 S29PL127H_129H_00A1
S29PL127H/S29PL129H
11
Pre l i m i n a r y
Table 3. Bank Select
(S29PL127H)
Table 4. Bank Select (S29PL129H)
Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data
to the device and erasing sectors of memory), the system must drive WE# and
CE# to VIL, and OE# to VIH.
The device features an Unlock Bypass mode to facilitate faster programming.
Once a bank enters the Unlock Bypass mode, only two write cycles are required
section has details on programming data to the device using both standard and
Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 4 indicates the address space that each sector occupies. A “bank address”
is the address bits required to uniquely select a bank. Similarly, a “sector ad-
dress” refers to the address bits required to uniquely select a sector. The
or suspending/resuming the erase operation.
ICC2 in the DC Characteristics table represents the active current specification for
bles and timing diagrams for write operations.
Accelerated Program Operation
The device offers accelerated program operations through the ACC function. This
function is primarily intended to allow faster manufacturing throughput at the
factory.
If the system asserts VHH on this pin, the device automatically enters the afore-
mentioned Unlock Bypass mode, temporarily unprotects any protected sectors,
and uses the higher voltage on the pin to reduce the time required for program
operations. The system would use a two-cycle program command sequence as
required by the Unlock Bypass mode. Removing VHH from the WP#/ACC pin re-
turns the device to normal operation. Note that VHH must not be asserted on
WP#/ACC for operations other than accelerated programming, or device damage
may result. In addition, the WP#/ACC pin should be raised to VCC when not in
Bank
A22–A20
Bank A
000
Bank B
001, 010, 011
Bank C
100, 101, 110
Bank D
111
Bank
CE1#
CE2#
A21–A20
Bank 1A
0
1
00, 01, 10
Bank 1B
0
1
11
Bank 2A
1
0
00
Bank 2B
1
0
01, 10, 11