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26
Revision 3.0
G
Signal Definitions
(Continued)
M4
V
SS
GND
---
---
---
M28
V
SS
GND
---
---
---
M29
4
MD7
I/O
IN
T
,
TS
2/5
V
IO
---
M30
V
IO
PWR
---
---
---
M31
DQM0
O
O
2/5
V
IO
---
N1
AV
CCCRT
PWR
---
---
---
N2
BLUE
O
WIRE
AV
C-
CCRT
---
N3
AV
SSCRT
GND
---
---
---
N4
V
CORE
PWR
---
---
---
N28
V
CORE
PWR
---
---
---
N29
WEA#
O
O
2/5
V
IO
---
N30
CASA#
O
O
2/5
V
IO
---
N31
RASA#
O
O
2/5
V
IO
---
P1
VREF
I/O
WIRE
AV
C-
CCRT
---
P2
SETRES
I
WIRE
AV
C-
CCRT
---
P3
AV
SSCRT
GND
---
---
---
P4
V
SS
GND
---
---
---
P28
V
SS
GND
---
---
---
P29
CS0#
O
O
2/5
V
IO
---
P30
BA0
O
O
2/5
V
IO
---
P31
BA1
O
O
2/5
V
IO
---
R1
V
PLL2
PWR
---
---
---
R2
V
SS
GND
---
---
---
R3
AV
SSPLL2
GND
---
---
---
R4
V
CORE
PWR
---
---
---
R28
V
CORE
PWR
---
---
---
R29
MA10
O
O
2/5
V
IO
---
R30
V
SS
GND
---
---
---
R31
MA0
O
O
2/5
V
IO
---
T1
4, 5
BUSY/WAIT#
I
IN
T
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD3
O
O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
F_C/BE1#
O
O
1/4
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
T2
V
IO
PWR
---
---
---
T3
4, 5
PE
I
(PU
22.5
PD
22.5
)
IN
T
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
(PU/PD under soft-
ware control.)
TFTD14
O
O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
F_C/BE2#
O
O
1/4
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail
Configuration
T4
4, 5
SLCT
I
IN
T
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD15
O
O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
F_C/BE3#
O
O
1/4
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
T28
DQM4
O
O
2/5
V
IO
---
T29
MA2
O
O
2/5
V
IO
---
T30
V
CORE
PWR
---
---
---
T31
MA1
O
O
2/5
V
IO
---
U1
4, 5
PD7
I/O
IN
T
,
O
14/14
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD13
O
O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD7
O
O
14/14
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
U2
V
SS
GND
---
---
---
U3
4, 5
ACK#
I
IN
T
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTDE
O
O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
FPCICLK
O
O
1/4
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
U4
V
CORE
PWR
---
---
---
U28
V
CORE
PWR
---
---
---
U29
4
MD33
I/O
IN
T
,
TS
2/5
V
IO
---
U30
V
SS
GND
---
---
---
U31
4
MD32
I/O
IN
T
,
TS
2/5
V
IO
---
V1
4, 5
PD4
I/O
IN
T
,
O
14/14
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD10
O
O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD4
O
O
14/14
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
V2
4, 5
PD5
I/O
IN
T
,
O
14/14
V
IO
PMR[23]
3
= 0 and
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD11
O
O
1/4
PMR[23]
3
= 1 and
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD5
O
O
14/14
PMR[23]
3
= 0 and
(PMR[27] = 1 or
FPCI_MON = 1)
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail
Configuration
Table 2-2.
432-EBGA Ball Assignment - Sorted by Ball Number (Continued)